Duty cycle detector and phase difference detector

Abstract

A duty cycle detector includes a first ring oscillator suitable for including an odd number of first inverters and generating a first periodic signal by using the first inverters, at least one inverter among the first inverters being enabled during a time interval when a clock has a first value, a second ring oscillator including an odd number of second inverters and suitable for generating a second periodic signal using the second inverters, at least one inverter among the second inverters being enabled during a time interval when the clock has a second value. The duty cycle detector further includes a frequency comparator suitable for comparing a frequency of the first periodic signal with a frequency of the second periodic signal and generating a duty cycle detection signal of the clock.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]The present application claims priority to Korean Patent Application No. 10-2017-0140210, filed on Oct. 26, 2017, which is incorporated herein by reference in its entirety.BACKGROUND1. Field[0002]Illustrative embodiments of the present disclosure relate to a duty cycle detector for detecting a duty cycle of a clock, and a phase difference detector for detecting a phase difference between clocks.2. Description of the Related Art[0003]As the data transfer rates of diverse integrated circuits, such as a memory, are increased, using a clock of a high frequency to transfer data between integrated circuits becomes increasingly burdensome. In this respect, multi-phase clocks of lower frequencies than the frequency of the clock used for data transfer between integrated circuits may be used in an integrated circuit chip.[0004]FIG. 1 illustrates an example of multi-phase clocks. Referring to FIG. 1, four clocks ICK, QCK, IBCK, and QBCK may have a ph...

AI Technical Summary

Benefits of technology

[0007]Embodiments of the present disclosure are directed to a technology for accurately detecting a duty cycle ratio of a clock and a technology for accurately detecting a phase difference between clocks.

Problems solved by technology

As the data transfer rates of diverse integrated circuits, such as a memory, are increased, using a clock of a high frequency to transfer data between integrated circuits becomes increasingly burdensome.

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