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Computer system having data amount reduction function and storage control method

a computer system and data amount technology, applied in the direction of memory address/allocation/relocation, input/output to record carriers, instruments, etc., can solve the problems of data that does not comply, data invalidity, increase, etc., and achieve the effect of reducing the processing load of the processor unit and preventing the increase of the processing load

Active Publication Date: 2021-08-10
HITACHI LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent aims to reduce data amount while reducing the processing load on a processor. This can be achieved by implementing certain techniques to manage data efficiently.

Problems solved by technology

As a result, invalid data (data that complies with the physical address which the mapping to the virtual address is canceled) increases.

Method used

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  • Computer system having data amount reduction function and storage control method
  • Computer system having data amount reduction function and storage control method
  • Computer system having data amount reduction function and storage control method

Examples

Experimental program
Comparison scheme
Effect test

embodiment 1

[0060]FIG. 1 illustrates an outline of Embodiment 1.

[0061]As an example of the computer system, the storage system is employed. The storage system includes one or more FMDs and a storage controller 101 connected to one or more FMDs. The storage controller 101 is an example of the controller including the processor unit.

[0062]The FMD is an example of the PDEV having at least one among a compression function and an unmapping function and a capacity virtualization function. The “unmapping function” is a function of canceling the mapping of an actual address (the FMD address in the following description) with respect to the designated virtual address (a physical address in the following description) (management is possible using a region that complies with the canceled physical address as a free space). “Capacity virtualization” is to provide a virtual address space having virtual capacity that does not depend on physical capacity (typically, virtual capacity greater than physical capac...

embodiment 2

[0267]Embodiment 2 will be described. At this time, the differences from Embodiment 1 will be mainly described, and the description of the common points with Embodiment 1 will be omitted or simplified.

[0268]In a case where the size of the dirty data is less than the deduplication unit size, the full dirtification processing is executed for the logical address (logical volume) in Embodiment 1, but the full dirtification processing is executed for the duplication management address (duplication management volume) in Embodiment 2. In other words, in Embodiment 2, a layer on which the full dirty data is generated is different from that in Embodiment 1.

[0269]FIG. 24 illustrates a flow of the duplication management processing according to Embodiment 2.

[0270]In step S2401, the address conversion program 414 refers to the deduplication dirty queue. The deduplication dirty queue is a command queue for the dirty data on the logical volume 501.

[0271]In step S2402, the address conversion progra...

embodiment 3

[0304]Embodiment 3 will be described. At this time, the differences from Embodiments 1 and 2 will be mainly described, and the description of the common points with Embodiments 1 and 2 will be omitted or simplified.

[0305]In Embodiment 3, the duplication source data is stored in the log-structured space 602 (buffer space). The deduplication processing is performed asynchronously with the processing that complies with the write request.

[0306]FIG. 28 illustrates a part of a flow of the deduplication processing according to Embodiment 3.

[0307]In a case of S2103: YES, the deduplication program 415 copies the duplication source data to the log-structured space 602. After this, S2104 is executed.

[0308]FIG. 36 is a schematic diagram of an example of the deduplication according to Embodiment 3.

[0309]The updated data B is written to the third logical address. The updated data B duplicates the existing data B that corresponds to the second logical address.

[0310]In this case, the deduplication ...

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PUM

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Abstract

In a case where updated data using a first logical address as a write destination and existing data using a second logical address as a write destination duplicate with each other, a computer system writes predetermined data instead of updated data to a memory segment associated with a first physical address, and dynamically maps the first logical address to a second physical address. The computer system transmits a write command of the predetermined data or an unmapping command that designates a virtual address that complies with the first physical address, to a storage device that corresponds to the first physical address. The first and second logical addresses are logical addresses that belong to a logical address range which is at least a part of a logical address space. The first physical address is a physical address that belongs to a physical address range which is at least a part of a physical address space, and is a physical address statically mapped to the first logical address.

Description

TECHNICAL FIELD[0001]The present invention generally relates to storage control in a computer system having a data amount reduction function.BACKGROUND ART[0002]An example of a computer system is a storage system. As a storage system having a data amount reduction function, for example, a storage system disclosed in PTL 1, that is, a storage system having a garbage collection function is known. PTL 1 discloses the following.[0003]The storage system includes a storage device and a storage controller having a garbage collection function. The storage controller manages mapping between a virtual address and a physical address of the storage device. In a case where writing to the virtual address occurs, the storage controller performs mapping update (update of the address conversion table) which means mapping a free physical address of a new write destination instead of the already allocated physical address with respect to the virtual address. As a result, invalid data (data that compli...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): G06F3/06G06F12/02
CPCG06F3/0658G06F3/0608G06F3/0631G06F3/0641G06F3/0673G06F12/0284G06F12/0246G06F2212/7203G06F2212/7201G06F2212/7205G06F12/0871
Inventor TATSUMI, RYOSUKEYOSHIHARA, TOMOHIRO
Owner HITACHI LTD