Method for fabricating an integrated circuit comprising a three-dimensional capacitor

Abstract

A capacitor fabricated, within an integrated circuit, has at least two capacitive trenches extending within a dielectric material. A metal layer is produced which is embedded in the dielectric material. To form the capacitor, the dielectric material is etched, with etching stopped at the metal layer so as to form the trenches. A layer of conductive material forming the lower electrode of the capacitor is then deposited at least on the sidewalls of the trenches and in contact with the metal layer. A dielectric layer is then deposited within the trenches. A layer of conductive material forming the upper electrode of the capacitor is then deposited within the trenches.

Description

PRIORITY CLAIM [0001] The present application claims priority from French Application for Patent No. 05 03894 filed Apr. 19, 2005, the disclosure of which is hereby incorporated by reference. BACKGROUND OF THE INVENTION [0002] 1. Technical Field of the Invention [0003] The present invention relates to integrated circuits and, more particularly, to integrated circuits comprising at least one three-dimensional capacitor. [0004] 2. Description of Related Art [0005] It is known to produce three-dimensional capacitors using an aluminum technology (reactive ion etching, RIE) or copper technology (Damascene). [0006] The three-dimensional capacitor is conventionally obtained by depositing a capacitive metal-insulator-metal (MIM) stack in which the lower layer is a conductive material, for example TiN. The insulator is a dielectric material of any permittivity (low, medium or high) and the upper electrode is a conductive material, for example TiN, in trenches which are obtained after etching...

AI Technical Summary

Benefits of technology

[0007] Embodiments of the present invention provide a solution to these problems, in particular by forming a metal layer which comes in contact with the bottom of the trenches and is both used as a stop layer for etching the trenches and partially short circuits the lower electrode of the capacitor. The etching height of the trenches is thus controlled from one batch to another, and the access resistance of the capacitor is reduced.

Problems solved by technology

It moreover proves difficult to ensure good etching reproducibility from one batch of wafers to another, which results in a dispersion of the capacitive values of theoretically identical capacitors.

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