System and Method for Efficiently Passing Information Between Compiler and Post-Compile-Time Software

a compiler and information technology, applied in the field of program optimization, can solve the problems that the execution of software programs optimized for an old computer architecture will not generally run as quickly on a computer system with a new architecture, face the challenge of analyzing low-level programs, etc., and achieve the effect of efficiently passing compiler information, and eliminating time overhead for analysis

Inactive Publication Date: 2007-09-27
CHEN DING KAI +1
View PDF0 Cites 12 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0010] To achieve the advantages and novel features, the present invention is generally directed to a system and method for efficiently passing compiler information at run time to hardware or software in an efficient way. The present invention is particularly useful for efficiently passing compiler information during code optimization or translation utilizing free or unused operand fields of instructions such as NOP, and encoding the compile time information in the unused operand field. This technique removes the time overhead for analyzing binaries or low-level programs and does not increase program code size.
[0011] The present invention provides a system and method for passing compile time information between a compiler and real-time operation of post-compile-time software. Briefly described, in architecture, the system can be implemented as follows. The preferred system of the present invention utilizes an unused NOP operand (a register usage bit vector) that is a vehicle (or communication channel) between a static compiler and a dynamic optimizer. Each bit in the vector represents a particular register and is used to indicate if the register may be live. The register usage bit vector in the unused NOP operand is used to make finding free registers easier during optimization.
[0012] The present invention can also be viewed as providing a method for passing compile time information between a compiler and real-time operation of post-compile-time software. In this regard, the method can be broadly summarized by the following steps: the compiler produces bit vectors for each basic block, (i.e., subroutine, function, and / or procedure) and places the bit vector in the unused portion of the NOP instruction encoding. A bit in the vector represents a particular register. A bit is set if the register may be live at the location of the NOP instruction and allows the dynamic optimizer to determine if further analysis of the low-level code to determine whether the register is truly live is required. On the other hand, a zero (i.e., unset) bit in the bit vector signals that the compiler does not use the corresponding register (i.e., is a dead register) at the location of the NOP instruction, and therefore the register can be used by the dynamic optimizer.
[0015] An advantage of deducing this missing information is that the information is particularly useful in improving performance of dynamic optimizations performed at runtime. This is because the analysis overhead directly reduces performance when performed. In the preferred method of the present invention, because the dynamic optimizations may inspect the unused NOP operands very quickly, the overhead is dramatically reduced to improve runtime performance.

Problems solved by technology

While it is possible that the software program developed for an original computer architecture will run on a computer system with a new or different architecture, the execution of the software program optimized for an old computer architecture will not generally run as quickly on a computer system with a new architecture, if at all.
When software tools such as dynamic optimizer or profiling tools work on the binaries produced by the compiler, they face the challenge of analyzing low-level programs.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • System and Method for Efficiently Passing Information Between Compiler and Post-Compile-Time Software
  • System and Method for Efficiently Passing Information Between Compiler and Post-Compile-Time Software
  • System and Method for Efficiently Passing Information Between Compiler and Post-Compile-Time Software

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0029] Reference will now be made in detail to the description of the invention as illustrated in the drawings. Although the invention will be described in connection with these drawings, there is no intent to limit it to the embodiment or embodiments disclosed therein. On the contrary, the intent is to include all alternatives, modifications, and equivalents included within the scope of the invention as defined by the appended claims.

[0030] As illustrated in FIG. 1A, computer system 12 today generally comprises a processor 21 and memory 31 (e.g., RAM, ROM, hard disk, CD-ROM, etc.) including an operating system 32. The processor 21 accepts binary program code 62 and data from the memory 31 over the local interface 23, for example, a bus(es). Direction from the user can be signaled by using input devices, for example but not limited to, a mouse 24 and a keyboard 25. The actions input and result output are displayed on the display terminal 26.

[0031] Also shown is the compiler 60, bi...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

System and method are described for register optimization during code translation utilizes a technique that removes the time overhead for analyzing register usage and eliminates fixed restraints on the compiler register usage. The present invention for register optimization utilizes a compiler to produce a register usage bit vector in a NOP instruction within each basic block (i.e., subroutine, function, and / or procedure). Each bit in the bit vector represents a particular caller-saved register. A bit is set if, at the location of NOP instruction, the compiler uses the corresponding register within that basic block containing the NOP instruction to hold information to be used at a later time. During the translation, the translator examines the register usage bit vector to very quickly determine which registers are free and therefore can be used during the register optimization without the need to save and restore the register values.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] This application is a continuation of copending U.S. utility application entitled, “SYSTEM AND METHOD FOR EFFICIENTLY PASSING INFORMATION BETWEEN [0002] COMPILER AND POST-COMPILE-TIME SOFTWARE,” having Ser. No. 09 / 422,539, filed Oct. 21, 1999, which is entirely incorporated herein by reference.BACKGROUND OF THE INVENTION [0003] 1. Field of the Invention [0004] The present invention is generally related to program optimization, and more particularly related to an apparatus and method for efficiently passing compiler information to post-compile-time software. [0005] 2. Description of Related Art [0006] As is known in the computer and software arts, when a software program is developed it will be optimized to run on a particular computer architecture. While it is possible that the software program developed for an original computer architecture will run on a computer system with a new or different architecture, the execution of the software...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(United States)
IPC IPC(8): G06F9/45
CPCG06F8/443G06F8/441G06F9/30076G06F9/30145
Inventor CHEN, DING-KAIJU, DZ-CHING
Owner CHEN DING KAI
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products