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118results about How to "High resistance" patented technology

Cryptographic processing apparatus, cryptographic-processing-algorithm constructing method, and cryptographic processing method, and computer program

To realize an extended-Feistel-type common-key block-cipher process configuration for realizing a diffusion-matrix switching mechanism (DSM). In a cryptographic process configuration in which an extended Feistel structure having a number of data lines: d that is set to an integer satisfying d≧2 is applied, a plurality of multiple different matrices are selectively applied to linear transformation processes performed in F-function sections. A plurality of different matrices satisfying a condition in which a minimum number of branches for all of the data lines is equal to or more than a predetermined value are selected as the matrices, the minimum number of branches for all of the data lines being selected from among minimum numbers of branches corresponding to the data lines, each of the minimum numbers of branches corresponding to the data lines being based on linear transformation matrices included in F-functions that are input to a corresponding data line in the extended Feistel structure. According to the present invention, common-key block cipher based on the DSM with a high resistance to linear analysis and differential analysis is realized.
Owner:SONY CORP

Differential transmission circuit and electronic device provided with the same

There is disclosed a differential transmission circuit capable of realizing a high resistance to electrostatic breakdown without deteriorating a transmission signal. The differential transmission circuit includes ESD protection elements 5 and 6 connected between transmission lines 3 and 4 and a ground, respectively, a common mode filter 9 in which an inductor element 7 serially connected between the transmission lines 3 and a transmission line 10, and an inductor element 8 serially connected between the transmission line 4 and a transmission line 11 are magnetically coupled to each other, ESD protection diodes 12 and 13 of which cathodes are connected to the transmission lines 10 and 11, respectively, and anodes thereof are connected to grounds, respectively, and resistors 14 and 15 of which one side terminals are connected to the transmission lines 10 and 11, respectively, and the other side terminals thereof are connected to transmission lines 16 and 17, respectively. Resistance values of the resistors 14 and 15 are set to 10 to 15 ohms, respectively, electrostatic capacitance values of the ESD protection elements 5 and 6 are less than 0.3 pF, respectively, and a clip voltage of each of the ESD protection diodes 12 and 13 is set to a value less than 10 V.
Owner:PANASONIC CORP
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