Shift register circuit and image display comprising the same

a technology of shift register and image display, which is applied in the direction of logic circuits, digital storage, instruments, etc., can solve the problems of reducing the rising and falling speed of output signals, affecting the operation of unit shift registers, and affecting the implementation of high-speed operations. , to achieve the effect of preventing the reduction of drive capability and preventing the reduction of defective operations
US20070247932A1Inactive Publication Date: 2007-10-25MITSUBISHI ELECTRIC CORP
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Patent Information

Authority / Receiving Office
US · United States
Patent Type
Applications(United States)
Current Assignee / Owner
MITSUBISHI ELECTRIC CORP
Publication Date
2007-10-25
Estimated Expiration
Not applicable · inactive patent

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Abstract

In a shift register circuit, a defective operation while an output signal is not outputted and a drive capability lowering while the output signal is outputted are prevented. A unit shift register comprises a first transistor for supplying a clock signal inputted to a first clock terminal to an output terminal, and the first transistor is driven by a drive circuit. A second transistor is connected between the gate of the first transistor and the output terminal and has a gate connected to the first clock terminal. The second transistor connects the gate of the first transistor to the output terminal based on the clock signal when the gate of the first transistor is at L (Low) level.
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Description

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a shift register circuit and more particularly, to a shift register circuit used in such as a scan line drive circuit in an image display and comprising only the same conductivity type field effect transistor.

[0003] 2. Description of the Background Art

[0004] According to an image display such a liquid crystal display (referred to as the “display” hereinafter), a gate line (scan line) is provided with respect to each pixel row (pixel line) of a display panel in which a plurality of pixels are arranged like a matrix, and the display image is updated by sequentially selecting and driving the gate line every cycle of one horizontal period of a display signal. Thus, as a gate line drive circuit (scan line drive circuit) for sequentially selecting and driving the pixel line, that is, the gate line, a shift register that makes one round of shifting for one frame period of the display signal can b...

Claims

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