Shift register circuit and image display comprising the same

a technology of shift register and image display, which is applied in the direction of logic circuits, digital storage, instruments, etc., can solve the problems of reducing the rising and falling speed of output signals, affecting the operation of unit shift registers, and affecting the implementation of high-speed operations. , to achieve the effect of preventing the reduction of drive capability and preventing the reduction of defective operations

Inactive Publication Date: 2007-10-25
MITSUBISHI ELECTRIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0014]It is an object of the present invention to provide a shift register circuit in which a defective operation is prevented while an output signal is not outputted and drive capability is prevented from being lowered while the output signal is outputted.

Problems solved by technology

Thus, when the gate potential exceeds the threshold voltage of the first transistor, the first transistor to be kept in the off state is unnecessarily turned on, which causes a defective operation of the unit shift register.
In this case, the problem is that the rising and falling speeds of the output signal are lowered and it is difficult to implement the high-speed operation.
Especially, since it is necessary to charge the gate line at high speed to activate it in order to ensure sufficient writing time of data to the pixel, in the gate line drive circuit of the display, lowering in the drive capability of the first transistor, that is, lowering in the drive capability of the unit shift register becomes a big problem.
As a result, when the drive capability of the first transistor is not sufficiently ensured, the problem the high speed operation is difficult arises again.

Method used

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  • Shift register circuit and image display comprising the same

Examples

Experimental program
Comparison scheme
Effect test

embodiment 1

[0057]FIG. 1 is a schematic block diagram showing the constitution of a display according to an embodiment 1 of the present invention and showing the whole constitution of a liquid crystal display 10 as a representative example of the display.

[0058]The liquid crystal display 10 comprises a liquid crystal array 20, a gate line drive circuit (scan line drive circuit) 30 and a source driver 40. Although it will be clear from the following description, a shift register according to this embodiment of the present invention is mounted on the gate line drive circuit 30.

[0059]The liquid crystal array 20 comprises a plurality of pixels 25 arranged like a matrix. Gate lines GL1, GL2, . . . (collectively called the “gate line GL”) are connected to rows of pixels (referred to as the “pixel lines” also hereinafter), respectively and data lines DL1, DL2, . . . (collectively called the “data line DL”) are connected to the columns of pixels (referred to as the “pixel columns” also hereinafter), res...

embodiment 2

[0130]According to the unit shift register SRn (FIG. 7) in the embodiment 1, the node N1 is charged by the previous stage output signal Gn−1. In other words, the output signal Gn of the unit shift register SRn is used not only for the gate line GLn, but also for charging the node N1 of the next stage unit shift register SRn+1.

[0131]The capacity component associated with the node N1 of the unit shift register SR includes the capacity of the capacity element C1 and the gate capacity of the transistor Q1. According to the embodiment 1, the capacity component becomes a part of the load capacity C3 of the output terminal OUT of the unit shift register SR, which causes the rising speed of the output signal to be lowered. This prevents the high-speed operation of the unit shift register SR.

[0132]According to an embodiment 2, a unit shift register SR that can solve the above problem is proposed. FIG. 12 is a circuit diagram of the unit shift register SR. As shown in FIG. 12, according to th...

embodiment 3

[0137]A display in which a shift register of a gate line drive circuit comprises an amorphous silicon TFT (a-Si TFT) is easy to be enlarged and has high productivity, so that it is widely used as a screen of a notebook personal computer or a big screen display.

[0138]Meanwhile, it has been known that when the gate electrode of the a-Si TFT is continuously positively biased, its threshold voltage shifts in a positive direction and its drive capability is lowered. For example, according to the circuit of the embodiment 1 (FIG. 7), since the clock signal / CLK is repeatedly inputted to the gate of the transistor Q2, there is concern that the threshold voltage of the transistor Q2 shifts and its drive capability is lowered and the output terminal OUT cannot be discharged. Thus, the electric charge that should be discharged from the node N1 through the transistor Q5 in the non-selected state is accumulated in the output terminal OUT and a defective operation in which the gate line GL to be...

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Abstract

In a shift register circuit, a defective operation while an output signal is not outputted and a drive capability lowering while the output signal is outputted are prevented. A unit shift register comprises a first transistor for supplying a clock signal inputted to a first clock terminal to an output terminal, and the first transistor is driven by a drive circuit. A second transistor is connected between the gate of the first transistor and the output terminal and has a gate connected to the first clock terminal. The second transistor connects the gate of the first transistor to the output terminal based on the clock signal when the gate of the first transistor is at L (Low) level.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to a shift register circuit and more particularly, to a shift register circuit used in such as a scan line drive circuit in an image display and comprising only the same conductivity type field effect transistor.[0003]2. Description of the Background Art[0004]According to an image display such a liquid crystal display (referred to as the “display” hereinafter), a gate line (scan line) is provided with respect to each pixel row (pixel line) of a display panel in which a plurality of pixels are arranged like a matrix, and the display image is updated by sequentially selecting and driving the gate line every cycle of one horizontal period of a display signal. Thus, as a gate line drive circuit (scan line drive circuit) for sequentially selecting and driving the pixel line, that is, the gate line, a shift register that makes one round of shifting for one frame period of the display signal can b...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G11C7/00
CPCG09G3/3677G09G2300/0408G11C19/28G09G2310/027G09G2310/08G09G2310/0267G09G3/20G09G3/36G11C19/00H03K19/00
Inventor TOBITA, YOUICHI
Owner MITSUBISHI ELECTRIC CORP
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