Operating method of p-channel non-volatile memory

Abstract

A P-channel non-volatile memory is described. The P-channel non-volatile memory includes a substrate, a first memory cell, and second memory cell. An N-well is disposed over the substrate, and the first cell and the second cell are disposed over the N-well. The first memory cell includes a first gate, a first charge storage structure, a first doped region and a second doped region. The first doped region and the second doped region are disposed in the substrate on the respective sides of the first gate. The second cell includes a second gate, a second charge storage structure, a third doped region, and the second doped region. The third doped region and the second doped region are disposed in the substrate on the respective sides of the second gate. The second cell and the first cell share the second doped region.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application is a divisional of an application Ser. No. 11 / 307,472, filed on Feb. 9, 2006, now pending. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to a memory and operating method thereof. More particularly, the present invention relates to a P-channel non-volatile memory and operating method thereof.[0004]2. Description of the Related Art[0005]Electrically erasable programmable read-only-memory (EEPROM) is a type of non-volatile memory that allows multiple data entry, reading and erasing operations. The stored data will be retained even after power to the device is removed. Moreover, the access speed is fast, the storage capacity per unit weight is large and the access device occupies only a small volume. With these advantages, EEPROM has become one o...

AI Technical Summary

Benefits of technology

The present invention provides a P-channel non-volatile memory with lower power consumption, higher operating speed, and higher storage capacity. The memory includes a substrate, an N-well, and a pair of serially connected first and second memory cells. The second memory cell has a shared second doped region with the first memory cell, which eliminates the need for an additional select transistor. The memory cells have a charge storage structure and doped regions that induce hot electron injection and hot hole injection for programming and erasing data. The memory operates at a low voltage and has a fast operating speed. The invention also provides a method for programming and erasing the memory cells.

Problems solved by technology

Moreover, the access speed is fast, the storage capacity per unit weight is large and the access device occupies only a small volume.

The N-channel non-volatile memory has small channel current and poor energy utilization.

Therefore, in a low energy consumption portable electronic product area, the applications of an N-channel non-volatile memory is rather restricted.

If the memory cell further incorporates a select transistor, the dimension of the device will increase and accordingly limit the development of a higher level of integration for the devices.

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