Metal-Insulator-Metal Capacitor
a technology of metal-insulator and capacitor, which is applied in the direction of capacitor, semiconductor device details, semiconductor/solid-state device details, etc., can solve the problems of high cost and the number of steps, the known method of fabricating a mim capacitor is limited, and the capacitor resistance changes, so as to reduce exposure, development and etching treatment, the effect of simplifying the fabrication of the capacitor
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first embodiment
[0030]FIG. 7 is a flow diagram illustrating a method for fabricating metal-insulator-metal capacitor according to the present invention. As shown in FIG. 7, an interlayer dielectric layer is formed on a semiconductor substrate by carrying out the step S201.
[0031]In this embodiment, the interlayer dielectric layer is made of silicon oxide or Borophosphosilicate Glass (BPSG) and the manner of forming the interlayer dielectric layer is the well-known chemical vapor deposition.
[0032]An insulation trench is formed in the interlayer dielectric layer to run through the interlayer dielectric layer and allow semiconductor substrate to be exposed by carrying out the step S202.
[0033]In this embodiment, the insulation trench is formed by dry etching the interlayer dielectric layer until the semiconductor substrate is exposed.
[0034]The insulation trench is filled with insulation material to form an insulation structure by carrying out the step S203.
[0035]In this embodiment, the insulation materi...
second embodiment
[0040]FIG. 8 is a flow diagram illustrating a method for fabricating metal-insulator-metal capacitor according to the present invention. As shown in FIG. 8, an interlayer dielectric layer is formed on a semiconductor substrate by carrying out the step S301.
[0041]In this embodiment, the interlayer dielectric layer is made of silicon oxide or Borophosphosilicate Glass (BPSG) and the manner of forming the interlayer dielectric layer is the well-known chemical vapor deposition.
[0042]Two metal trenches are formed in the interlayer dielectric layer to run through the interlayer dielectric layer and allow the semiconductor substrate to be exposed by carrying out the step S302.
[0043]In this embodiment, the metal trenches are formed by dry etching the interlayer dielectric layer until the semiconductor substrate is exposed.
[0044]The metal trenches are filled with metal material to form the electrodes of the capacitor by carrying out the step S303.
[0045]In this embodiment, the metal material ...
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Abstract
Description
Claims
Application Information
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