Semiconductor device manufacturing method and substrate processing system
a technology of semiconductor devices and processing systems, applied in electrical devices, cleaning processes and utensils, chemistry apparatus and processes, etc., can solve problems such as damage to the b>501/b> made of a low-k material, damage to the dielectric constant, and deterioration of some effects obtained, so as to achieve excellent electrical characteristics and reliability.
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first embodiment
[0061]FIG. 2 is an explanatory view schematically showing the arrangement of a semiconductor device manufacturing system used for a semiconductor device manufacturing process according to the present invention. This semiconductor device manufacturing system includes a process section 100 and a main control section 110. The process section 100 includes an SOD (Spin On Dielectric) apparatus 101, a resist coating / development apparatus 102, a light exposure apparatus 103, a denaturing / cleaning / recovering apparatus 104 for performing resist denaturing, cleaning, and recovery processes, an etching apparatus 105, a sputtering apparatus 106 used as a PVD apparatus, an electrolytic plating apparatus 107, and a CMP apparatus 109 used as a polishing apparatus. The main control section 110 includes a process controller 111, a user interface 112, and a memory portion 113. The SOD apparatus 101, sputtering apparatus 106, and electrolytic plating apparatus 107 of the process section 100 are film f...
second embodiment
[0149]Next, an explanation will be given of a
[0150]FIG. 15 is an explanatory view schematically showing the arrangement of a semiconductor device manufacturing system used for a semiconductor device manufacturing process according to a second embodiment of the present invention. In FIG. 15, the same constituent elements as those described above are denoted by the same reference numerals used in FIG. 2. This semiconductor device manufacturing system includes a process section 100′ and a main control section 110 having the same structure as that shown in FIG. 2. The process section 100′ includes an SOD (Spin On Dielectric) apparatus 101, a resist coating / development apparatus 102, a light exposure apparatus 103, a sputtering apparatus 106, an electrolytic plating apparatus 107, and a CMP apparatus 109 used as a polishing apparatus, which are the same as those in the first embodiment. The process section 100′ further includes an etching / ashing / recovering apparatus 108 for performing dr...
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