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Semiconductor device manufacturing method and substrate processing system

a technology of semiconductor devices and processing systems, applied in electrical devices, cleaning processes and utensils, chemistry apparatus and processes, etc., can solve problems such as damage to the b>501/b> made of a low-k material, damage to the dielectric constant, and deterioration of some effects obtained, so as to achieve excellent electrical characteristics and reliability.

Inactive Publication Date: 2011-05-26
TOKYO ELECTRON LTD
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Benefits of technology

[0011]An object of the present invention is to provide a semiconductor device manufacturing method to manufacture a semiconductor device excellent in electrical characteristics and reliability, and a substrate processing system to realize a manufacturing method of this kind.
[0013]According to a first aspect of the present invention, there is provided a semiconductor device manufacturing method comprising: forming an etching mask having a predetermined circuit pattern on a surface of an etching target film disposed on a semiconductor substrate; etching the etching target film through the etching mask to form a groove or hole in the etching target film; removing the etching mask by a process including at least a process using an ozone-containing gas; and recovering damage of the etching target film caused before or in said removing the etching mask, while supplying a predetermined recovery gas.
[0018]According to a third aspect of the present invention, there is provided a semiconductor device manufacturing method comprising: forming an etching mask having a predetermined circuit pattern on a surface of an etching target film disposed on a semiconductor substrate; etching the etching target film by dry etching through the etching mask to form a groove or hole in the etching target film; removing the etching mask by a dry process subsequently to said etching; supplying moisture into a space accommodating the semiconductor substrate to apply moisture onto the semiconductor substrate after said removing the etching mask; heating the semiconductor substrate with moisture adsorbed thereon; and recovering damage of the etching target film caused before or in said removing the etching mask, while supplying a predetermined recovery gas after said heating.
[0036]According to an eighth aspect of the present invention, there is provided a computer readable memory medium that stores a control program for execution on a computer to control a substrate processing system for processing a substrate, wherein the control program, when executed, causes the computer to control the substrate processing system to conduct a semiconductor device manufacturing method comprising: forming an etching mask having a predetermined circuit pattern on a surface of an etching target film disposed on a semiconductor substrate; etching the etching target film by dry etching through the etching mask to form a groove or hole in the etching target film; removing the etching mask by a dry process subsequently to said etching; supplying moisture into a space accommodating the semiconductor substrate to apply moisture onto the semiconductor substrate after said removing the etching mask; heating the semiconductor substrate with moisture adsorbed thereon; and recovering damage of the etching target film caused before or in said removing the etching mask, while supplying a predetermined recovery gas after said heating.
[0037]According to the present invention, a method may be performed, as follows. Specifically, an etching target film disposed on a semiconductor substrate is etched through an etching mask to form an interconnection groove or connection hole. Then, the etching mask is removed by a process including a process using a process gas containing ozone. Specifically, at this time, the etching mask is denatured by ozone and water vapor used as a process gas, and then is processed by purified water or a chemical liquid. Alternatively, the etching mask is denatured by ozone used as a process gas, and then is processed by purified water or a chemical liquid. Thereafter, a recovery process using a process gas is performed by, e.g., a silylation process. Consequently, the etching mask can be removed at a practical rate, and then the damage of the etching target film caused in removing the etching mask can be sufficiently recovered. It follows that a semiconductor device can be manufactured to have improved electrical characteristics and reliability.
[0038]Further, according to the present invention, a method may be performed, as follows. Specifically, an etching target film disposed on a semiconductor substrate is etched through an etching mask to form an interconnection groove or connection hole. Then, the etching mask is removed, and then a recovery process using a recovery gas is performed by, e.g., a silylation process. At this time, the semiconductor substrate is heated before and / or after starting supply of the recovery gas. Consequently, the effect of the recovery process is enhanced, so that the damage of the etching target film caused in removing the etching mask can be sufficiently recovered. It follows that a semiconductor device can be manufactured to have improved electrical characteristics and reliability.

Problems solved by technology

However, according to the conventional damascene process described above, when a resist film is peeled, the inter-level insulating film 501 made of a Low-k material is damaged.
This damage increases the dielectric constant of the inter-level insulating film 501, and deteriorates some effects obtained by using the Low-k material.
However, this technique is insufficient not only in the effect of suppressing damage but also in the effect of peeling resist, and thus is unpractical.

Method used

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  • Semiconductor device manufacturing method and substrate processing system
  • Semiconductor device manufacturing method and substrate processing system
  • Semiconductor device manufacturing method and substrate processing system

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first embodiment

[0061]FIG. 2 is an explanatory view schematically showing the arrangement of a semiconductor device manufacturing system used for a semiconductor device manufacturing process according to the present invention. This semiconductor device manufacturing system includes a process section 100 and a main control section 110. The process section 100 includes an SOD (Spin On Dielectric) apparatus 101, a resist coating / development apparatus 102, a light exposure apparatus 103, a denaturing / cleaning / recovering apparatus 104 for performing resist denaturing, cleaning, and recovery processes, an etching apparatus 105, a sputtering apparatus 106 used as a PVD apparatus, an electrolytic plating apparatus 107, and a CMP apparatus 109 used as a polishing apparatus. The main control section 110 includes a process controller 111, a user interface 112, and a memory portion 113. The SOD apparatus 101, sputtering apparatus 106, and electrolytic plating apparatus 107 of the process section 100 are film f...

second embodiment

[0149]Next, an explanation will be given of a

[0150]FIG. 15 is an explanatory view schematically showing the arrangement of a semiconductor device manufacturing system used for a semiconductor device manufacturing process according to a second embodiment of the present invention. In FIG. 15, the same constituent elements as those described above are denoted by the same reference numerals used in FIG. 2. This semiconductor device manufacturing system includes a process section 100′ and a main control section 110 having the same structure as that shown in FIG. 2. The process section 100′ includes an SOD (Spin On Dielectric) apparatus 101, a resist coating / development apparatus 102, a light exposure apparatus 103, a sputtering apparatus 106, an electrolytic plating apparatus 107, and a CMP apparatus 109 used as a polishing apparatus, which are the same as those in the first embodiment. The process section 100′ further includes an etching / ashing / recovering apparatus 108 for performing dr...

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Abstract

A semiconductor device manufacturing method includes: forming an etching mask having a predetermined circuit pattern on a surface of an etching target film disposed on a semiconductor substrate; etching the etching target film through the etching mask to form a groove or hole in the etching target film; removing the etching mask by a process including at least a process using an ozone-containing gas; and recovering damage of the etching target film caused before or in said removing the etching mask, while supplying a predetermined recovery gas.

Description

CROSS REFERENCE TO RELATED APPLICATION[0001]The present divisional application claims the benefit of priority under 35 U.S.C. 120 to application Ser. No. 11 / 564,548, filed Nov. 29, 2006, and claims the benefit of priority under 35 U.S.C. 119 from Japanese Application No. 2005-346854, filed on Nov. 30, 2005. The entire contents of application Ser. No. 11 / 564,548 are hereby incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to a method of manufacturing a semiconductor device by use of, e.g., a single damascene method or dual damascene method, and a substrate processing system used for manufacturing a semiconductor device.[0004]2. Description of the Related Art[0005]In semiconductor device manufacturing processes, a dual damascene method is frequently used for forming interconnection lines embedded in trenches and / or connection holes (for example, see Jpn. Pat. Appln. KOKAI Publication No. 2002-83869). FIGS. 1A...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): C23F1/08B08B13/00
CPCH01L21/3105H01L21/31138H01L21/67051H01L21/67069H01L21/76826H01L21/67178H01L21/67207H01L21/76808H01L21/76814H01L21/67109H01L21/28
Inventor ASAKO, RYUICHIMAEKAWA, KAORUFUJII, YASUSHI
Owner TOKYO ELECTRON LTD
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