Semiconductor device
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embodiment 1
[0041]In this embodiment, a structure and a manufacturing method of a semiconductor device according to one embodiment of the disclosed invention will be described with reference to FIGS. 1A and 1B, FIGS. 2A to 2C, FIGS. 3A to 3C, FIGS. 4A to 4C, and FIGS. 5A to 5C. Note that FIGS. 1A and 1B, FIGS. 2A to 2C, FIGS. 3A to 3C, FIGS. 4A to 4C, and FIGS. 5A to 5C illustrate part of the semiconductor device for explanation of the semiconductor device and the manufacturing method thereof and do not illustrate the entire structure of the semiconductor device.
[0042]FIGS. 1A and 1B illustrate an example of a structure of the semiconductor device. FIG. 1A is a plan view illustrating part of the semiconductor device, and FIG. 1B is a cross-sectional view taken along line A1-A2 of FIG. 1A. In addition, a cross section taken along line A1-A2 of FIG. 2A corresponds to the cross section shown in FIG. 1B. The same applies to FIGS. 2B and 2C, FIGS. 3A to 3C, FIGS. 4A to 4C, and FIGS. 5A to 5C. The se...
embodiment 2
[0125]In this embodiment, an example of application of a semiconductor device according to one embodiment of the disclosed invention will be described with reference to FIGS. 6A-1, 6A-2, and 6B and FIGS. 7 to 10. Here, an example of a memory device is described. Note that in some circuit diagrams, “OS” is written beside a transistor in order to indicate that the transistor includes an oxide semiconductor.
[0126]First, a basic circuit configuration and an operation thereof will be described with reference to FIGS. 6A-1, 6A-2, and 6B. In a semiconductor device illustrated in FIG. 6A-1, a first wiring (1st Line) is electrically connected to a source electrode (or a drain electrode) of a transistor 160. A second wiring (2nd Line) is electrically connected to a drain electrode (or a source electrode) of the transistor 160. A third wiring (3rd Line) is electrically connected to a source electrode (or a drain electrode) of a transistor 162. A fourth wiring (4th Line) is electrically connect...
application example
[0152]Next, a more specific circuit configuration to which the circuit illustrated in FIGS. 6A-1, 6A-2, and 6B is applied and an operation thereof will be described with reference to FIGS. 7 to 10.
[0153]FIG. 7 is an example of a circuit diagram of a semiconductor device including m (rows) (in a vertical direction)×n (columns) (in a horizontal direction) memory cells 190. The configuration of the memory cells 190 in FIG. 7 is similar to that in FIG. 6A-1. That is, the first wiring and the third wiring in FIG. 6A-1 correspond to a bit line BL in FIG. 7; the second wiring in FIG. 6A-1, a source line SL in FIG. 7; the fourth wiring in FIG. 6A-1, a signal line S in FIG. 7; and the fifth wiring in FIG. 6A-1, a word line WL in FIG. 7. Note that in FIG. 7, the memory cells 190 in a column direction are connected in series in such a manner that the transistors 162 are connected in series and the transistors 160 are connected in series; thus, only the memory cells 190 in the first row are con...
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