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Method for dicing a semiconductor wafer having through silicon vias and resultant structures

a technology of silicon vias and semiconductor wafers, applied in the direction of semiconductor devices, semiconductor/solid-state device details, electrical devices, etc., can solve the problems of low yield rate, traditional cutting blades are no longer suitable for very narrow cutting lines, and the semiconductor wafer collapses

Active Publication Date: 2014-05-15
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent text describes a semiconductor device and a method of dicing a semiconductor wafer. The semiconductor device includes a die with a conductive via and a passivation layer covering a portion of the back surface of the die. The passivation layer has a rough surface with a first roughness caused by a laser sintering process. The semiconductor device also includes a protection cap on the protruded conductive via. The semiconductor device and a second semiconductor device are encapsulated in a molding compound. The method of dicing a semiconductor wafer involves applying a first laser to remove a part of the passivation layer and expose a part of the semiconductor wafer, applying a second laser to focus at an interior portion of the semiconductor wafer, and applying a lateral force to the semiconductor wafer. The technical effects of the patent text include improved protection of the conductive via and reduced roughness of the passivation layer surface.

Problems solved by technology

However, where the thickness of the semiconductor wafer is very thin, the dicing process performed by the cutting blade can result in the collapse of the semiconductor wafer.
In addition, the traditional cutting blade is no longer suitable for very narrow cutting lines.
Although laser-based techniques have been used to overcome some of the problems with sawing, yield rates are low when singulating wafers having uneven surfaces using conventional laser cutting technology.

Method used

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  • Method for dicing a semiconductor wafer having through silicon vias and resultant structures
  • Method for dicing a semiconductor wafer having through silicon vias and resultant structures
  • Method for dicing a semiconductor wafer having through silicon vias and resultant structures

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Embodiment Construction

[0017]Referring to FIG. 1, a cross-sectional view of a semiconductor device 1, according to an embodiment of the present invention, is illustrated. The semiconductor device 1 comprises a substrate 10, an active surface 18 disposed on a first (lower) surface 101 of the substrate 10, an integrated circuit (not shown) formed on the active surface 18, a passivation layer 12 disposed on a second (upper) surface 102 of the substrate 10, the substrate further having third (side) surfaces 103, at least one conductive via 14 formed in the substrate 10, wherein a protection cap 16 is formed over a protruding end of the conductive via 14, at least one die bond pad 20 disposed on the active surface 18 and a connection element 22 disposed on each of the bond pads 20, respectively. The connection element 22 may be a copper pillar, solder or a solder bump, a stud bump or a combination of any of the above.

[0018]The substrate 10 can be made from silicon, germanium, gallium arsenide, or other semicon...

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Abstract

The present invention provides a semiconductor device, a semiconductor package and a semiconductor process. The semiconductor process includes the following steps: (a) providing a semiconductor wafer having a first surface, a second surface and a passivation layer; (b) applying a first laser on the passivation layer to remove a part of the passivation layer and expose a part of the semiconductor wafer; (c) applying a second laser, wherein the second laser passes through the exposed semiconductor wafer and focuses at an interior of the semiconductor wafer; and (d) applying a lateral force to the semiconductor wafer. Whereby, the cutting quality is ensured.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to semiconductor wafer processing and, more particularly, to a method for dicing a semiconductor wafer using laser technology.[0003]2. Description of the Related Art[0004]In a typical semiconductor manufacturing process, a large number of semiconductor devices are formed on a silicon wafer. The semiconductor devices are made by forming thin layers of semiconductor, insulator, and metal materials patterned to form electronic components and integrated circuits. After the semiconductor devices are formed on the wafer, each of the devices (die) must be separated. The process of separating the individual die is referred to as “dicing” the wafer.[0005]Traditionally, dicing saws have been used for dicing a semiconductor wafer. However, where the thickness of the semiconductor wafer is very thin, the dicing process performed by the cutting blade can result in the collapse of the semiconductor wafer...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/78H01L23/00H01L23/48
CPCH01L21/78H01L23/562H01L23/481H01L21/76898H01L2924/0002H01L23/3121H01L23/3135H01L23/3171H01L2224/13076H01L2224/13084H01L2224/03002H01L23/293H01L24/03H01L24/05H01L24/11H01L24/13H01L21/6836H01L2221/6834H01L2224/0345H01L2224/05009H01L2224/05558H01L2224/0557H01L2224/13017H01L2224/13025H01L2224/13144H01L2224/13147H01L2224/13155H01L2224/13164H01L2224/14181H01L2224/73204H01L2224/81005H01L2224/81191H01L2224/94H01L2224/05568H01L2224/11472H01L2224/11009H01L2224/11002H01L2224/16146H01L2224/16227H01L2224/1134H01L2224/131H01L2924/00014H01L2224/0401H01L2924/181H01L2224/16225H01L2924/12042H01L2224/11H01L2924/014H01L2224/05552H01L2924/00H01L2224/13
Inventor HUA, PEI HSINGCHANG, HUI-SHAN
Owner ADVANCED SEMICON ENG INC