Method of characterizing and modeling leakage statistics and threshold voltage for ensemble devices

Abstract

An approach for determining leakage current and threshold voltage for ensemble semiconductor devices, implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having program instructions, are operable to: receive a number m of individual devices within an ensemble device; identify a sub-threshold slope; determine an uplift factor; separate random variation in logarithm of a leakage current into a correlated random component and an uncorrelated random component; determine a first standard deviation of correlated random component for the ensemble device; determine a second standard deviation of the uncorrelated random component for the ensemble device; generate a statistical model for electrical features of the ensemble device, based on the number m of individual devices, the sub-threshold slope, the uplift factor, the first and second standard deviation, and statistical random variables; and determine the electrical features of the ensemble device based on the statistical model.

Description

FIELD OF THE INVENTION[0001]The present invention generally relates to determining chip power optimization, and more particularly, to a method and system for determining accurate levels of leakage current and threshold voltage for ensemble semiconductor devices.BACKGROUND[0002]Within the field of circuits and semiconductors, various electrical features of different circuit devices, such as field effect transistors (FETs), metal-oxide-semiconductor FETs (MOSFETs), etc., can be used to determine chip power optimization of the circuit device. For example, various types of FETs include structure that comprises a gate, source, and drain. When the gate voltage of a FET device (i.e., the voltage difference between the gate and the source of the FET device) is larger than the threshold voltage of the FET, electric current (also called drain current) can travel from the source to the drain. However, when the gate voltage applied to the FET is less than the threshold voltage, there is not a s...

AI Technical Summary

Benefits of technology

This patent describes a method for analyzing electrical characteristics of an ensemble device, which is made up of multiple identical devices. The method involves identifying a sub-threshold slope, determining an uplift factor, and separating random variation into a correlated and uncorrelated component. A statistical model is then generated to predict the leakage current and threshold voltage of the ensemble device based on the number of devices, the sub-threshold slope, the uplift factor, and statistical random variables. The system includes instructions for carrying out the method and a computer program product for analyzing leakage current. The technical effect of this patent is that it provides a more accurate and reliable means to analyze the electrical characteristics of multiple identical devices within an ensemble device.

Problems solved by technology

This amount of current is known as the leakage current and can affect the total chip power dissipation for a device.

When a FET device contains multiple individual FET devices that are connected in parallel (often called an ensemble FET; examples include multi-finger planar FET, a finFET device containing multiple fins), other issues can exist relating to determining the leakage current.

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