Semiconductor device including barrier layer and manufacturing method thereof

Abstract

A manufacturing method of a semiconductor device includes the following steps. A barrier layer is formed in a first region and a second region of a semiconductor substrate. The barrier layer formed in the first region is thinned before a step of forming a first work function layer on the barrier layer. The first work function layer formed on the first region is then removed. The process of thinning the barrier layer in the first region and the process of removing the first work function layer in the first region are performed separately for ensuring the coverage of the first work function layer in the second region. The electrical performance of the semiconductor device and the uniformity of the electrical performance of the semiconductor device may be improved accordingly.

Description

BACKGROUND OF THE INVENTION1. Field of the Invention[0001]The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly, to a semiconductor device including a barrier layer with different thicknesses in different regions and a manufacturing method thereof.2. Description of the Prior Art[0002]The development of semiconductor integrated circuit technology progresses continuously and circuit designs in products of the new generation become smaller and more complicated than those of the former generation. The amount and the density of the functional devices in each chip region are increased constantly according to the requirements of innovated products, and the size of each device has to become smaller accordingly.[0003]Poly-silicon is conventionally used as a gate electrode in semiconductor devices, such as the metal-oxide-semiconductor (MOS). With the trend towards scaling down the size of semiconductor devices, however, conventional...

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Benefits of technology

[0007]In the semiconductor device and the manufacturing method thereof in the present invention, the first etching process for thinning the barrier layer in the first region and the second etching process for removing the first work function layer in the first region are not performed successively, and the first etching process is performed before the step of forming the first work function layer. Compared with an etching time of a single etching process for removing the first work function layer in the first region and thinning the barrier layer in the first region at the same time, the etching time of the second etching process in the present invention may become relatively shorter. The etching condition of the first work function layer in the adjacent second region may be improved for avoiding influencing the coverage of the first work function layer in the second region, and the electrical performance of the semiconductor device and the uniformity of the electrical performance may be improved accordingly.

Problems solved by technology

The development of semiconductor integrated circuit technology progresses continuously and circuit designs in products of the new generation become smaller and more complicated than those of the former generation.

With the trend towards scaling down the size of semiconductor devices, however, conventional poly-silicon gates face problems such as inferior performance due to boron penetration and unavoidable depletion effects.

This increases equivalent thickness of the gate dielectric layer, reduces gate capacitance and worsens a driving force of the devices.

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