Laterally diffused field effect transistor and a method of manufacturing the same

Abstract

An LDFET may be formed on the basis of manufacturing platforms designed for forming sophisticated small signal transistor elements. To this end, sidewall areas of trench isolation regions laterally positioned within the drift region may be used as current paths, thereby achieving increased design flexibility, since efficient current paths may still be established, even if the trench isolation regions have to extend into the substrate material due to design criteria determined by the sophisticated small signal transistor elements. In some illustrative embodiments, isolation of P-LDFETs with respect to the P-substrate may be accomplished without requiring a deep well implantation.

Description

BACKGROUND1. Field of the Disclosure[0001]Generally, the present disclosure relates to semiconductor devices and manufacturing techniques in which laterally diffused field effect transistors may be formed on the basis of a manufacturing platform in which sophisticated small transistor elements also have to be implemented.2. Description of the Related Art[0002]Significant progress has been made over the past decades in the field of semiconductor devices by steadily reducing the lateral dimensions of the circuit elements, such as transistor elements, resistors, capacitors and the like. Although various approaches have been taken to form semiconductor devices of ever increasing performance and reduced dimensions, the CMOS technology has been proven to be a most viable candidate and has developed into a technical domain for producing powerful, yet cost effective, semiconductor devices. That is, in the CMOS technology, complementary transistor elements are provided, i.e., P-type transist...

AI Technical Summary

Benefits of technology

The present invention provides a method for designing semiconductor devices using advanced technology without the need for deep dopant implantations. The method utilizes well regions in the device that meet the requirements of small signal transistor elements and provides sufficient isolation for high power / high voltage transistors. The invention also includes the use of current paths in the drift region of the transistor elements, which allows for reliable performance even when design constraints require the extension of the trench isolation region deep into the well region. The method also allows for various design features to further enhance the performance of the semiconductor device.

Problems solved by technology

Consequently, increasingly highly complex control circuitry may have to be combined with analog circuit portions, high power or high voltage circuit portions, RF (radio frequency) circuit elements and the like in order to comply with the various requirements of complex electronic systems.

These small signal transistor elements may provide powerful control circuitry, including a large number of individual transistors, for example, up to several hundred million transistor elements, thereby requiring highly complex manufacturing techniques and process strategies.

Upon further scaling the dimensions of logic transistor elements, for example, requiring a gate length in planar transistor architectures of 30 nm and significantly less, it turns out, however, that, in particular, the requirement for deep well regions in LDFETs may contribute to process-related issues, since, in particular, deep N-well regions may be required to appropriately isolate the drain region of a P-LDFET from the typically P-doped substrate material.

Therefore, additional and complex processes may have to be implemented, thereby contributing to overall process complexity and, thus, manufacturing costs.

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