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30 results about "Diffuse field" patented technology

Diffuse field principle. Theoretically, diffuse field is defined as a Sound pressure field where there is no privileged direction of the energy. In other words, when sound pressure is the same everywhere in the room. This is obtained with large rooms with no absorbent materials on walls, ceiling or floor. Diffusion is enhanced in asymmetric rooms.

High-robustness P type symmetric laterally double-diffused field effect transistor

InactiveCN103280462AImprove the problem of insufficient electrostatic discharge capacityMaximum lattice temperature dropSemiconductor devicesBody contactLow voltage
The invention discloses a high-robustness P type symmetric laterally double-diffused field effect transistor, which comprises a P type substrate, wherein an N type epitaxial layer is arranged on the P type substrate; two P type drift traps, two P type buffer traps and two N type body contact regions are arranged in the N type epitaxial layer; a P type drain region and a P type source region are arranged in the P type buffer trap respectively; the surface of the N type epitaxial layer is provided with a gate oxide layer and a field oxide layer; the surface of the gate oxide layer is provided with a polycrystalline silicon gate; the surfaces of the field oxide layer, the N type body contact regions, the P type source region, the polycrystalline silicon gate and the P type drain region are provided with passivation layers; the high-robustness P type symmetric laterally double-diffused field effect transistor is characterized in that the surfaces of the two P type drift traps are also provided with a photo-etching plate shared with the low-voltage P type trap; first and second shallow P type traps formed by low-energy ion implantation are adopted; and the surface electric field distribution is effectively optimized at the region, the highest lattice temperature is reduced, the secondary breakdown current is improved and the robustness of the device in an ESD (Electronic Static Discharge) process is enhanced.
Owner:SOUTHEAST UNIV

Vertical double-diffused field effect transistor and preparation method thereof

A vertical double-diffused field effect transistor includes an N-type substrate, an N-type epitaxial layer formed on the N-type substrate, first and second P-type implanted regions formed on the surface of the N-type epitaxial layer, a P-type epitaxial layer formed on the N-type epitaxial layer and the first and second P-type implanted regions, first and second N-type implanted regions formed on the surface of the P-type epitaxial layer and corresponding to the first and second P-type implanted regions respectively, a silicon oxide layer formed in the P-type epitaxial layer and the first and second N-type implanted regions, first and second trenches passing through the silicon oxide layer and the first N-type implanted region and extending into the first and second P-type implanted regionsrespectively; silicon oxide formed in the inner walls of the first and the second trenches and connected with the silicon oxide layer, openings passing through the silicon oxide layer between the first and the second trenches and corresponding to the P-type epitaxial layer and the first and second N-type implanted regions, and polycrystalline silicon formed on the surface of the silicon oxide layer in the first and second trenches.
Owner:SHANGHAI XINLONG SEMICON TECH CO LTD

Vertical double-diffused field-effect transistor and fabrication method thereof

A vertical double-diffused field-effect transistor comprises an N-type substrate, an N-type epitaxial region, a first P-type body region, a second P-type body region, two first N-type injection regions, two second N-type injection regions, a third N-type injection region, a first P-type injection region, a second P-type injection region, a grid oxide layer, a poly-silicon layer, a dielectric layer, a first through hole and a second through hole, wherein the first P-type body region and the second P-type body region are formed on a surface of the N-type epitaxial region, the two first N-type injection regions are arranged on a surface of the first P-type body region, the two second N-type injection regions are arranged on a surface of the second P-type body region, the third N-type injection region is arranged on a surface of the N-type epitaxial region, the first P-type injection region is arranged between the two first N-type injection regions, the second P-type injection region is arranged between the two second N-type injection regions, the grid oxide layer and the poly-silicon layer are sequentially formed on the N-type epitaxial region, the first P-type body region, the secondP-type body region, the first N-type injection region and the second N-type injection region, the dielectric layer is formed on the poly-silicon layer and on the first N-type injection region, the second N-type injection region and the third N-type injection region, the first through hole penetrates through the dielectric layer and is corresponding to the first N-type injection region and the first P-type injection region, and the second through hole penetrates through the dielectric layer and is corresponding to the second N-type injection region and the second P-type injection region.
Owner:深圳市金誉半导体股份有限公司

A Highly Robust P-Type Symmetric Lateral Double-Diffused Field-Effect Transistor

InactiveCN103280462BImprove the problem of insufficient electrostatic discharge capacityMaximum lattice temperature dropSemiconductor devicesLow voltageBody contact
The invention discloses a high-robustness P type symmetric laterally double-diffused field effect transistor, which comprises a P type substrate, wherein an N type epitaxial layer is arranged on the P type substrate; two P type drift traps, two P type buffer traps and two N type body contact regions are arranged in the N type epitaxial layer; a P type drain region and a P type source region are arranged in the P type buffer trap respectively; the surface of the N type epitaxial layer is provided with a gate oxide layer and a field oxide layer; the surface of the gate oxide layer is provided with a polycrystalline silicon gate; the surfaces of the field oxide layer, the N type body contact regions, the P type source region, the polycrystalline silicon gate and the P type drain region are provided with passivation layers; the high-robustness P type symmetric laterally double-diffused field effect transistor is characterized in that the surfaces of the two P type drift traps are also provided with a photo-etching plate shared with the low-voltage P type trap; first and second shallow P type traps formed by low-energy ion implantation are adopted; and the surface electric field distribution is effectively optimized at the region, the highest lattice temperature is reduced, the secondary breakdown current is improved and the robustness of the device in an ESD (Electronic Static Discharge) process is enhanced.
Owner:SOUTHEAST UNIV

Wide-bandgap semiconductor lateral double-diffused field effect transistor with transverse and longitudinal electric field simultaneous optimization function

InactiveCN107623039AExtended longitudinal space charge regionImprove breakdown voltageSemiconductor devicesLDMOSPartial charge
The invention discloses a wide-bandgap semiconductor lateral double-diffused field effect transistor with a transverse and longitudinal electric field simultaneous optimization function. An assisted depletion substrate buried layer is arranged below a drift region at the drain end, and a substrate buried layer with partial charge compensation is arranged in a substrate area below the drift regionof LDMOS and near the assisted depletion substrate buried layer. A new electric field peak is introduced to the surface transverse electric field of the device, so that the surface transverse electricfield of the device is distributed more uniformly, and the surface transverse electric field of the device is well optimized. A new electric field peak is also introduced to the inside longitudinal electric field distribution of the device, which further optimizes the inside longitudinal electric field. The structure breaks through the voltage saturation phenomenon caused by the limited longitudinal withstand voltage. Most importantly, the surface transverse electric field and the inside longitudinal electric field can be optimized simultaneously, and the breakdown voltage of the device is greatly improved.
Owner:XIDIAN UNIV

Lateral double diffused field effect transistor and method of forming the same

A lateral double diffused field effect transistor and its forming method. The lateral double diffused field effect transistor comprises: a semiconductor substrate doped with impurity ions of a first conductivity type; a first shallow trench located in the semiconductor substrate Trench isolation structure; a drift region located in the semiconductor substrate, the drift region surrounds the first shallow trench isolation structure, the drift region is doped with impurity ions of a second conductivity type, the second conductivity type is opposite to the first conductivity type ; An inversion doped region located in the drift region, the depth of the inversion doped region is less than the depth of the drift region, and the inversion doped region is doped with impurity ions of the first conductivity type; The body region in the semiconductor substrate is doped with impurity ions of the first conductivity type; a gate structure is formed on the semiconductor substrate, one end of the gate structure extends above the body region, and the other end extends to the first above the shallow trench isolation structure. The gate-to-drain parasitic capacitance of the lateral double-diffused field effect transistor is reduced.
Owner:SEMICON MFG INT (SHANGHAI) CORP
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