Vertical double-diffused field effect transistor and preparation method thereof

Abstract

A vertical double-diffused field effect transistor includes an N-type substrate, an N-type epitaxial layer formed on the N-type substrate, first and second P-type implanted regions formed on the surface of the N-type epitaxial layer, a P-type epitaxial layer formed on the N-type epitaxial layer and the first and second P-type implanted regions, first and second N-type implanted regions formed on the surface of the P-type epitaxial layer and corresponding to the first and second P-type implanted regions respectively, a silicon oxide layer formed in the P-type epitaxial layer and the first and second N-type implanted regions, first and second trenches passing through the silicon oxide layer and the first N-type implanted region and extending into the first and second P-type implanted regionsrespectively; silicon oxide formed in the inner walls of the first and the second trenches and connected with the silicon oxide layer, openings passing through the silicon oxide layer between the first and the second trenches and corresponding to the P-type epitaxial layer and the first and second N-type implanted regions, and polycrystalline silicon formed on the surface of the silicon oxide layer in the first and second trenches.

Description

【Technical field】 [0001] The invention relates to the technical field of semiconductor chip fabrication, in particular to a vertical double diffused field effect transistor (VDMOS) and a fabrication method thereof. 【Background technique】 [0002] The drain and source poles of the vertical double diffused field effect transistor (VDMOS) are respectively on both sides of the device, so that the current flows vertically inside the device, increasing the current density, improving the rated current, and the on-resistance per unit area is also small, which is a A very versatile power device. [0003] For power devices, there are two extremely important parameters, one is on-resistance and the other is breakdown voltage. From the application of power devices in electronic equipment, it is hoped that the on-resistance should be as small as possible, and the higher the breakdown voltage, the better. In order to withstand high voltages, power devices need to use very thick low-dope...

AI Technical Summary

Problems solved by technology

By increasing the thickness of the epitaxial layer or reducing the doping concentration of the epitaxial layer, the breakdown voltage can be increased, but at the same time, the on-resistance is increased, which is not conducive to reducing the power loss when the device is turned on.

It can be seen that it is difficult for general power devices to optimize both on-resistance and breakdown voltage at the same time; that is to say, the performance of the existing vertical double-diffused field-effect transistors as the main power devices is low

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