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Field correction of overlay error

a field correction and overlay technology, applied in the field of optical lithographic techniques, can solve the problems of overlay error, increasing difficulty in transferring a pattern from a mask to the target, and becoming increasingly difficult to produce a precise pattern imag

Inactive Publication Date: 2005-01-11
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The invention provides methods for correcting a photolithographic mask by using overlay error values across a field of the mask. This results in improved uniformity of features at the circuit level of the apparatus. The methods involve determining overlay error variation across the mask, defining at least two zones with similar overlay error values, and correcting each zone with a correction that is approximately the average overlay error value for that zone. The corrected mask is then used to produce electronic systems with improved uniformity of features. The invention also includes computer programs, systems, and methods for selectively establishing opaque areas on a clear support. Overall, the invention improves the accuracy and efficiency of producing semiconductor circuits and other electronic systems.

Problems solved by technology

Because of increased semiconductor device complexity that results in increased pattern complexity, and increased pattern packing density on the mask, it is becoming increasingly difficult to produce a precise pattern image despite advances in photolithographic techniques.
One problem leading to increased difficulty in transferring a pattern from a mask to the target is overlay error.
Overlay error occurs where two discrete patterned layers are formed using masks on two separate lithography systems.
This residual offset may be unacceptable as feature dimensions continue to decrease.

Method used

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Examples

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Embodiment Construction

In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific embodiments in which the inventions may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that process or mechanical changes may be made without departing from the scope of the present invention. The terms wafer and substrate used in the following description include any base semiconductor structure. Both are to be understood as including silicon-on-sapphire (SOS) technology, silicon-on-insulator (SOI) technology, thin film transistor (TFT) technology, doped and undoped semiconductors, epitaxial layers of a silicon supported by a base semiconductor structure, as well as other semiconductor structures well known to one skilled in the art. Further...

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Abstract

Methods of correcting for overlay error, wherein the methods account for relative offset across the field of exposures of more than one photolithography projection system, as well as systems to perform the methods and apparatus produced therefrom. The methods include defining at least two zones within a field of a mask having substantially similar overlay error values. The methods further include modifying the coordinates of a feature of the mask in response to a correction for the zone to which the feature is mapped, where the correction corresponds to a nominal overlay error value for that zone.

Description

TECHNICAL FIELD OF THE INVENTIONThe present invention relates generally to optical lithographic techniques commonly used in the formation of integrated circuits and structures on a semiconductor substrate. In particular, the present invention relates to methods of correcting a mask for use in photolithography, systems to perform the correction and apparatus produced from such a corrected mask.A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever. The following notice applies to the software and data as described below and in the drawings hereto: Copyright ©1999, Micron Technology, Inc., All Rights Reserved.BACKGROUND OF THE INVENTIONSemiconductor device features are primarily fabricated using photo...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): G03F7/20G03F1/14G03F1/00
CPCG03F1/144G03F7/70633G03F7/70458G03F1/70
Inventor BAGGENSTOSS, BILL
Owner MICRON TECH INC