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4928results about "Photographic processes" patented technology

Methods and Scatterometers, Lithographic Systems, and Lithographic Processing Cells

In a method of determining the focus of a lithographic apparatus used in a lithographic process on a substrate, the lithographic process is used to form a structure on the substrate, the structure having at least one feature which has an asymmetry in the printed profile which varies as a function of the focus of the lithographic apparatus on the substrate. A first image of the periodic structure is formed and detected while illuminating the structure with a first beam of radiation. The first image is formed using a first part of non-zero order diffracted radiation. A second image of the periodic structure is foamed and detected while illuminating the structure with a second beam of radiation. The second image is formed using a second part of the non-zero order diffracted radiation which is symmetrically opposite to the first part in a diffraction spectrum. The ratio of the intensities of the measured first and second portions of the spectra is determined and used to determine the asymmetry in the profile of the periodic structure and/or to provide an indication of the focus on the substrate. In the same instrument, an intensity variation across the detected portion is determined as a measure of process-induced variation across the structure. A region of the structure with unwanted process variation can be identified and excluded from a measurement of the structure.
Owner:ASML NETHERLANDS BV

Data hierarchy layout correction and verification method and apparatus

A method and apparatus for the correction of integrated circuit layouts for optical proximity effects which maintains the original true hierarchy of the original layout is provided. Also provided is a method and apparatus for the design rule checking of layouts which have been corrected for optical proximity effects. The OPC correction method comprises providing a hierarchically described integrated circuit layout as a first input, and a particular set of OPC correction criteria as a second input. The integrated circuit layout is then analyzed to identify features of the layout which meet the provided OPC correction criteria. After the areas on the mask which need correction have been identified, optical proximity correction data is generated in response to the particular set of correction criteria. Finally, a first program data is generated which stores the generated optical proximity correction data in a hierarchical structure that corresponds to the hierarchical structure of the integrated circuit layout. As the output correction data is maintained in true hierarchical format, layouts which are OPC corrected according to this method are able to be processed through conventional design rule checkers with no altering of the data.
Owner:SYNOPSYS INC
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