Semiconductor device and method of fabricating the same

Abstract

A semiconductor device. The device includes an active region isolated by an isolation structure on a substrate, and a dielectric layer overlying the active region and the isolation structure. The dielectric layer comprises a lower part overlying the active region beyond the boundary of the active region and the isolation structure, and a protruding part overlying the boundary of the active region and the isolation structure.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The invention relates to semiconductor technology and in particular to devices, for low gate voltage and higher drain breakdown performance.[0003]2. Description of the Related Art[0004]A complete circuit, such as an integrated circuit (IC), usually comprises thousands of transistors. A shallow trench isolation (STI) serves as an isolation region to prevent short circuit between two adjacent transistors. Such STI is formed by producing a shallow trench in a semiconductor substrate by anisotropically etching the semiconductor substrate using a silicon nitride layer as a hard mask, and then filling the shallow trench with an insulating layer.[0005]The characteristics of STIs depend on whether the STI has a liner layer. However, defects, such as shallow pitting, may occur in an STI with no liner layer, due to subsequent oxidation. The defect degrades the electrical characteristics of the resultant device, and causes leakage...

AI Technical Summary

Benefits of technology

The invention provides semiconductor devices with improved breakdown voltages of isolation regions. This is achieved by a method that involves forming a dielectric layer overlying an active region and an isolation structure, with the dielectric layer comprising a lower part with a curved surface profile and a protruding part with a flat surface profile. The invention also provides semiconductor devices with a step structure of the dielectric layer, which further improves the breakdown voltages of the isolation regions. The technical effect of the invention is to enhance the reliability and stability of semiconductor devices.

Problems solved by technology

However, defects, such as shallow pitting, may occur in an STI with no liner layer, due to subsequent oxidation.

The defect degrades the electrical characteristics of the resultant device, and causes leakage current in a junction region, i.e., adversely affects the isolation of the device.

In addition, since the shallow trench formed in the substrate is angulated at its top corner, a gate oxide layer grows insufficiently or non-uniformly during subsequent thermal oxidation.

As a result, breakdown voltage of the gate oxide layer on the active region becomes lower, and a parasitic current occurs in a transistor, thereby degrading the operability of the resultant device.

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