Flash memory unit and mfg. method

Abstract

The quick flash memory comprises following parts: P type substrate, deep N type trap area setup on P type substrate, stack grid structure comprising oxide layer through tunnel, floating grid, dielectric layer in grid poles, control grid pole and top layer in sequence on P type substrate, source pole and drain pole positioned at two sides of the said stack grid structure, gap wall at side of the stack grid structure, P type pocket dope area extended from drain area to position near to source area and under lower trap of the stack grid structure, P type dope area through the drain area and junctions on P type pocket dope area, and contact window above the drain area and connected to P type dope area electrically.

Description

technical field [0001] The invention relates to a non-volatile memory (Non-Volatile Memory, NVM) component, in particular to a flash memory unit and a manufacturing method thereof. Background technique [0002] Flash memory components have the advantages of being able to store, read, and erase data multiple times, and the stored data will not disappear after power failure, so it has become a widely used in personal computers and electronic devices. A non-volatile memory component. [0003] A typical flash memory component uses doped polysilicon to make a floating gate (Floating Gate) and a control gate (Control Gate). Moreover, the control gate is directly arranged on the floating gate, the floating gate and the control gate are separated by a dielectric layer, and the floating gate and the substrate are separated by a tunnel oxide layer (Tunnel Oxide), forming The so-called stacked gate flash memory cell. [0004] Please refer to FIG. 1 for a schematic structural diagram...

AI Technical Summary

Problems solved by technology

Since the aspect ratio of the opening of the contact window is very large, and two different materials (silicon oxide and silicon) need to be etched, it is difficult to control the depth of the opening of the contact window, which increases the difficulty of the manufacturing process.

Moreover, in the back-end manufacturing process, since the contact windows in the memory cell area and the contact windows in the peripheral circuit area must be formed separately, the complexity of the back-end manufacturing process will also be increased.

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