Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method for removing lattice defect in pad area of semiconductor device

A technology of lattice defects and pad areas, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device testing/measurement, etc., can solve the reliability impact of DRAM, not particularly reliable, lattice defects in pad areas And other issues

Inactive Publication Date: 2008-01-16
SEMICON MFG INT (SHANGHAI) CORP +1
View PDF2 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method of limiting the interval time (Q time) between the aluminum alloy passivation layer forming step (step 6) and the polyimide protective layer forming step (step 7) is not particularly reliable, once the Q time is exceeded , lattice defects will be generated in the pad area
Moreover, lattice defects were found in the pad area even after the polyimide protective layer was formed
These defects can negatively affect the reliability of DRAM

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for removing lattice defect in pad area of semiconductor device
  • Method for removing lattice defect in pad area of semiconductor device
  • Method for removing lattice defect in pad area of semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

specific Embodiment

[0014] A method for removing lattice defects in a pad (PAD) region of a semiconductor device according to the present invention will be described in detail below with reference to FIG. 2 . Fig. 2 is a flowchart of a pad forming process of a semiconductor device according to the present invention.

[0015] The pad formation process flow of the semiconductor device according to the present invention shown in Fig. 2 is to increase after the step 7 (forming the polyimide protective layer) of the pad formation process flow of the existing semiconductor device shown in Fig. 1 : Step S1, detecting whether there is a lattice defect in the pad area; and Step S2, performing argon (Ar) plasma sputtering repair treatment when step S1 detects that there is a lattice defect in the pad area. In step S1, use an optical microscope (OM) to detect whether there is a lattice defect in the pad area. When it is found that there is a lattice defect in the pad area, take a microscopic photo of the pa...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

This invention discloses a method for removing lattice defect in the pad zone of a semiconductor device with Ar plasma sputter reparation which forms a polyimide protection layer then tests if lattice defect exists in the pad zone, if so, the Ar plasma sputter is made to repair and remove the lattice defect.

Description

technical field [0001] The present invention relates to the method for removing the lattice defect in the bonding pad (PAD) region of semiconductor device, relate in particular to using argon (Ar) plasma sputtering to repair and remove the lattice defect in the bonding pad (PAD) region of semiconductor device The method, particularly relates to the method for removing lattice defects in the pad (PAD) region of dynamic random access memory (hereinafter referred to as DRAM) by argon (Ar) plasma sputtering repair treatment. Background technique [0002] Semiconductor devices include various types of active devices. For example, dynamic random access memory (DRAM) is a semiconductor device with a multi-layer structure. In order to connect components formed in various film layers together to form a complete DRAM, and the required electronic circuit modules are formed by connecting DRAM with other semiconductor devices or other electronic components. To complete these connections,...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/44H01L21/28H01L21/768H01L21/60H01L21/321H01L21/66
Inventor 吴长明蒋晓钧徐立郭文彬
Owner SEMICON MFG INT (SHANGHAI) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products