Manufacturing process of self-aligned silicide barrier layer

Abstract

The invention discloses a method for manufacturing a self-aligned silicide barrier layer. First, a first layer of silicon dioxide is grown by CVD, and then a second layer of silicon dioxide is grown on the first layer of silicon dioxide by HDP. silicon. The invention can solve the problem of the filling ability of the self-aligned silicide barrier layer between the polysilicon lines, effectively overcome the pinhole phenomenon, and achieve the purpose of reducing the leakage current.

Description

technical field [0001] The invention relates to a manufacturing process method of a semiconductor integrated circuit, in particular to a manufacturing process method of a self-aligned silicide barrier layer. Background technique [0002] With the development of integrated circuits, the polysilicon line width and the spacing between line widths are becoming narrower and narrower, which has more and more implications for the filling ability of salicide blocks between polysilicon lines. Come higher demands. When the filling capacity is insufficient, such as figure 1 In the case shown in , voids are created between polysilicon lines due to insufficient filling capability. [0003] At the same time, due to the consideration of the filling ability, it is required that the grown salicide barrier layer should be as thin as possible, but this will inevitably cause pinholes, which will affect the device. Such as figure 2 As shown, the pinhole phenomenon due to the formation of th...

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Problems solved by technology

[0004] The technical problem to be solved by the present invention is to provide a method for manufacturing a self-aligned silicide barrier layer, which can solve the problem of the filling capacity of the self-aligned silicide barrier layer between polysilicon lines, and effectively overcome the pinhole phenomenon. Reduce leakage current

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