A non-negative resistant LDMOS device structure and the corresponding manufacturing method
A device structure and device technology, applied in the field of semiconductor microelectronics design and manufacturing, can solve the problems of increasing process steps and difficulty in process realization, and achieve the effects of reducing drain-source leakage current, avoiding negative resistance effect, and protecting devices
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Embodiment 1
[0045] 1). On a P-type silicon substrate with a resistivity of 0.01 Ω cm, a P-type epitaxial layer with a thickness of 5 μm and an epitaxy of 8 Ω cm ( Figure 2.1 );
[0046] 2). Use high-energy and high-dose ion implantation to heat and advance or use ICP to etch the deep groove that penetrates the epitaxial layer, and perform sidewall diffusion and boron-doped polysilicon filling to form a high-concentration boron-doped region surrounding the drift region ( Figure 2.2 b), while forming a high-concentration boron connection region connecting the surface source and the back substrate ( Figure 2.2 a);
[0047] 3). Using local oxidation technology for field oxidation and gate sacrificial layer oxidation with etch, gate oxide, thickness ( Figure 2.3 );
[0048] 4). LPCVD deposited polysilicon, thickness (4000~6000) Photolithography etch polysilicon to form a polysilicon gate pattern ( Figure 2.4 );
[0049] 5). With polysilicon as the self-alignment boundary, the c...
Embodiment 2
[0056] 1). On a P-type silicon substrate with a resistivity of 0.02 Ω cm, a P-type epitaxial layer with a thickness of 10 μm ( Figure 2.1 );
[0057] 2). Use high-energy and high-dose ion implantation to heat and advance or use ICP to etch the deep groove that penetrates the epitaxial layer, and perform sidewall diffusion and boron-doped polysilicon filling to form a high-concentration boron-doped region surrounding the drift region ( Figure 2.2 b), while forming a high-concentration boron connection region connecting the surface source and the back substrate ( Figure 2.2 a);
[0058] 3). Using local oxidation technology for field oxidation and gate sacrificial layer oxidation with etch, gate oxide, thickness ( Figure 2.3 );
[0059] 4). LPCVD deposited polysilicon, thickness Photolithography etch polysilicon to form a polysilicon gate pattern ( Figure 2.4 );
[0060] 5). With polysilicon as the self-alignment boundary, the channel implantation area is photolit...
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