660 results about "Source structure" patented technology

A heat dissipating LED signal lamp emitting structure includes an isothermal board, a light emitting unit on the isothermal board, a heat conducting cylinder connected to the bottom of the isothermal board, a heat dissipating body around the periphery of the heat conducting cylinder and comprised of heat sinks, a circular cover body above the isothermal board for covering the isothermal board, a reflecting groove at the center of the cover body for passing through the light emitting unit, and a transparent lid on the cover body for covering the light emitting unit. With the heat dissipating effect of the heat dissipating body, the operating heat produced by the light emitting unit can be dissipated to the outside. The invention not only uses a single light emitting unit as a signal lamp emitting source, but also enhances the light emitting efficiency and the life expectancy of the light emitting unit.

A fuel control system and method for providing fuel to an internal combustion engine are provided. The fuel control system generally includes at least one valve device structured to deliver a fuel supply to the engine, a first fuel source structured to provide a primary fuel to the valve device, a second fuel source structured to provide an alternate fuel to the valve device, and an electronic controller structured to control the valve device. The electronic controller controls the valve device as a function of various data to selectively deliver the primary fuel and the alternate fuel to generate a fuel supply, e.g. as a mixture of the two fuels. The data used to control the fuel supply may include GPS data, engine data, environmental data, and/or other operational data.

This invention discloses bottom-source lateral diffusion MOS (BS-LDMOS) device. The device has a source region disposed laterally opposite a drain region near a top surface of a semiconductor substrate supporting a gate thereon between the source region and a drain region. The BS-LDMOS device further has a combined sinker-channel region disposed at a depth in the semiconductor substrate entirely below a body region disposed adjacent to the source region near the top surface wherein the combined sinker-channel region functioning as a buried source-body contact for electrically connecting the body region and the source region to a bottom of the substrate functioning as a source electrode. A drift region is disposed near the top surface under the gate and at a distance away from the source region and extending to and encompassing the drain region. The combined sinker-channel region extending below the drift region and the combined sinker-channel region that has a dopant-conductivity opposite to and compensating the drift region for reducing the source-drain capacitance.

The invention relates to an energy storage system capacity configuration optimizing method capable of enhancing wind power receiving capacity. The method is characterized in that by constructing a relation between energy storage capacity and equivalent load peak-valley difference, calculating power grid wind power accepting capacity with limit of downward peak-adjustment capacity, calculating the improvement of wind power accepting capacity of an energy storage system, and optimizing the configuration of energy storage capacity under the premise that the energy storage system has the maximum total income, the problem that the access of large-scale wind power is limited due to restrictions of a network source structure and peak-adjusting capacity can be solved, and the influences of the energy storage cost and the large wind power receiving benefits on the capacity of the energy storage system can be fully considered, so that the capacity of the energy storage system is reasonably optimized, further the income maximization is realized.

Methods and apparatus for monitoring oxygen saturation levels in tissue are disclosed. According to one aspect of the present invention, a sensor arrangement for use in an optical imaging system includes a first source structure, a second source structure, and a detector arrangement. The first source structure provides a first beam of light and the second source structure provides a second beam of light. The detector arrangement includes detector structures that have centerpoints, and receives the first and second beams of light after the first and second beams of light are reflected off of an external surface. The detector arrangement is arranged to define a first axis that passes through the centerpoint of each detector structure, and a distance from a centerpoint of the first source structure to the first axis is not equal to a distance from a centerpoint of the second source structure to the first axis.

Embodiments of source structure of a three-dimensional (3D) memory device and method for forming the source structure of the 3D memory device are disclosed. In an example, a NAND memory device includes a substrate, an alternating conductor/dielectric stack, a NAND string, a source conductor layer, and a source contact. The alternating conductor/dielectric stack includes a plurality of conductor/dielectric pairs above the substrate. The NAND string extends vertically through the alternating conductor/dielectric stack. The source conductor layer is above the alternating conductor/dielectric stack and is in contact with an end of the NAND string. The source contact includes an end in contact with the source conductor layer. The NAND string is electrically connected to the source contact by the source conductor layer. In some embodiments, the source conductor layer includes one or more conduction regions each including one or more of a metal, a metal alloy, and a metal silicide.

The present invention provides a versatile system for producing sense transistors having optimized thermal and parametric matching with an associated power transistor. A power transistor is formed, having a plurality of alternating source and drain structures, with a plurality of gate structures interposed there between. At a desired location within the power transistor—which may be in a central location, or symmetrically distributed—one or more sense transistors are formed from an isolated portion of either a drain or source structure.

A high efficiency LED chip is disclosed that comprises an active LED structure comprising an active layer between two oppositely doped layers. A first reflective layer can be provided adjacent to one of the oppositely doped layers, with the first layer comprising a material with a different index of refraction than the active LED structure. The difference in IR between the active LED structure and the first reflective layer increases TIR of light at the junction. In some embodiments the first reflective layer can comprise an IR lower than the semiconductor material, increasing the amount of light that can experience TIR. Some embodiments of LED chips according to the present invention can also comprise a second reflective layer or metal layer on and used in conjunction with the first reflective layer such that light passing through the first reflective layer can be reflected by the second reflective layer.

A semiconductor device includes a substrate and a source structure and a drain structure formed on the substrate. At least one nanowire structure interconnects the source structure and drain structure and serves as a channel therebetween. A gate structure is formed over said at least one nanowire structure to provide a control of a conductivity of carriers in the channel, and the nanowire structure includes a center core serving as a backbias electrode for the channel.

The invention discloses a large-size direct type LED backlight source and a preparation method. The backlight source structure comprises an edge emission type LED, a metal basal plate and a lower wall casing; the edge emission type LED comprises a conical half-reflecting semi-permeable mirror, an LED chip, packaging resin and an LED lamp holder; a plurality of light reflecting bowls are punched on the metal basal plate and are evenly distributed on the metal basal plate, the lower wall casing is in a frame-shaped structure and is arranged at the lower end of the metal basal plate, a hollow cavity is formed between the lower wall casing and the metal basal plate, the lower surface of the metal basal plate and the upper surface of the lower wall casing are provided with fine structures in the hollow cavity, fine structures at the lower ends of the light reflecting bowls are connected with the fine structure at the upper surface of the lower wall casing, and a liquid absorption core is formed; and support columns are arranged between the adjacent light reflecting bowls, have equal heights with the light reflecting bowls and are connected with the fine structure at the upper surface of the lower wall casing, and a liquid absorption core is formed. The invention provides an LED backlight source structure compromising the performance and the energy consumption under the precondition of low cost and realizing the lightness and the thinness of a large-size LED and a manufacturing process.

The invention relates to a sending end power grid power source structure planning method considering local load peak regulation capacity. A power source structure planning model is established in combination with various actual constraint conditions such as peak regulation constraints on the basis of considering wind and light storage peak regulation capacity and local load peak regulation capacity. The method comprises the following steps: establishing a power source structure planning model considering local load peak regulation capacity; obtaining a unit maintenance plan, considering to addthe power and local load peak regulation capacity of an energy storage wind power plant and a solar power station, and carrying out random production simulation of wind, solar energy, water, fire andpumping storage power generation; and obtaining hybrid particle swarm optimization to solve the power source structure planning model, and thus obtaining an optimal power source structure planning scheme. Compared with the prior art, the method has the advantages that users and electric automobiles are considered to serve as local load to participate electric power system peak regulation actively, the difference between peak and valley of the system can be reduced effectively and the difficulty of electric power system peak regulation is relieved.

A three-dimensional semiconductor memory device includes a substrate, an electrode structure including gate electrodes sequentially stacked on the substrate, a source structure between the electrode structure and the substrate, vertical semiconductor patterns passing through the electrode structure and the source structure, a data storage pattern between each of the vertical semiconductor patterns and the electrode structure, and a common source pattern between the source structure and the substrate. The common source pattern has a lower resistivity than the source structure and is connected to the vertical semiconductor patterns through the source structure.

A lighting source structure has a base having at least one electrode coupled to a power source and a plurality of light sources, with each light source electrically coupled to the electrode to produce light when stimulated. The plurality of light sources are arranged on the base in a manner such that the light produced from the plurality of light sources is projected to form a lighted area that has a central focus point which is separate from the locations of each of the plurality of light sources.

The invention discloses a backlight source structure and a display device. The backlight source structure comprises a back board, a rubber frame, an optical film material and a first light source, wherein the back board comprises a bottom plate and a side wall which is vertical to the bottom plate; the rubber frame is arranged on the side wall; the rubber frame comprises a plane support part which is used for supporting the optical film material; the first light source is located on the bottom plate and corresponds to the plane support part; a through hole is formed in the plane support part; light emitted from the first light source can be transmitted to the optical film material through the through hole. According to the backlight source structure, the edge shading phenomenon easily generated by a display panel is avoided; the effects of improving the effective display area of the display panel and the visual experience of a user are achieved.

The invention belongs to programmable component structure technology field, specially a local programmable logic array wiring resource structure and modeling method which supports the crutch line. The wiring resource structure of the invention includes: programmable interconnected line, uniform switch matrix, input and output multi path selector array and logic unit. It breaks the limit of level and uprightness interlinkage resource, introduces the concept of crutch line, makes the wiring path not pass the programmable switch, it gives attention to speed and agility. The description of wiring line resource, the interconnected line is distributed to the repeated unit then integral interconnected resource is described by describing an interconnected line resource in a repeated unit. This describing method is very flexible, the kind, amount, proportion of interconnected resource can be changed conveniently, and any switch array can be generated.