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Narrow pulse pull-down current type level displacement circuit

A level shift circuit and current pulling technology, applied in the field of electronics, can solve the problems of increasing circuit complexity, unsuitable for high-voltage applications, and high device requirements, and achieve the effects of widening the scope of application, low power consumption, and simplifying the circuit structure

Inactive Publication Date: 2009-11-18
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the rising edge and falling edge of the control signal are converted into narrow pulses respectively, the circuit is very complicated
In addition, the logic level on the high side is obtained directly from the voltage across the load resistor R1 or R2, and the displacement current when the power switch is turned on or off can easily generate voltage fluctuations on the load resistors R1 and R2, resulting in false trigger signals
Therefore, a certain pulse filter circuit must be used at the high voltage end to eliminate false trigger signals, which also increases the complexity of the circuit
[0007] To sum up, the currently used level shifting circuit has complex circuits, high device requirements, and is not suitable for high-voltage applications.

Method used

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  • Narrow pulse pull-down current type level displacement circuit
  • Narrow pulse pull-down current type level displacement circuit
  • Narrow pulse pull-down current type level displacement circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0025] Such as Figure 5 As shown: the input buffer 1 circuit unit is composed of PMOS transistor MP1 and NMOS transistor MN1, the constant current source switch A circuit unit is composed of PMOS transistor MHP1 and NMOS transistors MN2, MHN1 and MHN2, and the constant current source switch B circuit unit is composed of PMOS transistor MHP2 It is composed of NMOS transistors MN3, MHN3 and MHN4, the pulse self-generating A circuit unit is composed of PMOS transistor MP7 and diode D3, the pulse self-generating B circuit unit is composed of PMOS transistor MP8 and diode D1, and the gate pull-down 6 circuit unit is composed of PMOS transistor MP4 , MP5, NMOS transistors MN4, MN5 and diodes D2, D4, and the inverter 7 circuit unit is composed of PMOS transistor MP6 and NMOS transistor MN6. The DC power supply VDC2 is composed of a DC power supply VDC3 and a DC power supply VDC3, wherein the voltage of the DC power supply VDC3 is higher than that of the DC power supply VDC3.

[002...

Embodiment approach 2

[0062] Such as Figure 6 As shown: the input buffer 1 circuit unit is composed of PMOS transistor MP1 and NMOS transistor MN1, the constant current source switch A circuit unit is composed of PMOS transistor MHP1 and NMOS transistors MN2, MHN1 and MHN2, and the constant current source switch B circuit unit is composed of PMOS transistor MHP2 It is composed of NMOS transistors MN3, MHN3 and MHN4, the pulse self-generating A circuit unit is composed of PMOS transistor MP7 and diode D3, the pulse self-generating B circuit unit is composed of diodes D1 and D5, and the gate pull-down 6 circuit unit is composed of PMOS transistors MP4 and MP5 It is composed of NMOS transistors MN4, MN5 and diodes D2, D4, and the circuit unit of the inverter 7 is composed of PMOS transistor MP6 and NMOS transistor MN6. The DC power supply VDC2 is composed of the DC power supply VDC3 and the DC power supply VDC3, wherein the voltage of the DC power supply VDC3 is higher than that of the DC power suppl...

Embodiment approach 3

[0069] Such as Figure 7 As shown, the input buffer 1 circuit unit is composed of PMOS transistor MP1 and NMOS transistor MN1, the constant current source switch A circuit unit is composed of PMOS transistor MHP1 and NMOS transistors MN2, MHN1 and MHN2, and the constant current source switch B circuit unit is composed of PMOS transistor MHP2 It is composed of NMOS transistors MN3, MHN3 and MHN4, the pulse self-generating A circuit unit is composed of diodes D3 and D6, the pulse self-generating B circuit unit is composed of PMOS transistor MP8 and diode D1, and the gate pull-down 6 circuit unit is composed of PMOS transistors MP4 and MP5 It is composed of NMOS transistors MN4, MN5 and diodes D2, D4, and the circuit unit of the inverter 7 is composed of PMOS transistor MP6 and NMOS transistor MN6. DC power supply VDC2 is composed of DC power supply VDC3 and DC power supply VDC3, wherein the voltage of DC power supply VDC3 is higher than that of DC power supply VDC3; the timing o...

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Abstract

The invention belongs to the field of electronic technology and relates to an integrated level shift circuit. It is mainly composed of seven circuit units including input buffer 1, constant current source switches A and B, pulse self-generation A and B, gate pull-down 6 and inverter 7. The low logic signal IN generates two control signals S1 and S2 of the same phase and reverse phase through the input buffer 1, which are used to control the constant current source switch A and control the constant current source switch B to obtain constant current output signals S3 and S4; The narrow pulse pull-down currents S5 and S6 are obtained from the self-generated A and pulse self-generated B circuits; then the floating level shift signal S7 with a level of VB~VH is generated by the gate pull-down 6 circuit, and after S7 passes through the inverter 7, it is in the inverter A high logic signal Vout-VB that is synchronous and in-phase with the low logic signal IN is generated between the output terminal of the phaser 7 and the high-side floating ground VB. The invention has the characteristics of simple circuit, low requirement for devices, low self-power consumption, no false trigger phenomenon, stable working state, easy integration and suitable for high-voltage application.

Description

technical field [0001] The invention belongs to the field of electronic technology, relates to an integrated level shift circuit, and simultaneously relates to a driving circuit of a floating high-end MOS switch. Background technique [0002] In the intelligent power integrated circuit of the bridge power switch structure, the high-side bridge arm and the low-side bridge arm are composed of power MOS or IGBT. The driving of the high-side bridge arm has the following basic requirements: First, the lower logic level compatible with CMOS / TTL logic needs to be shifted to the high logic level that can drive the power switch. Second, in order to make the working states of the high-side and low-side MOS switches symmetrical, the same logic level as that of the low-side MOS switch must be provided between the gate and source of the high-side MOS switch. However, in the switching process of the high-side bridge arm, the source potential of the power MOS used as a high-side switch fl...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/0175H03K19/0185H03K17/687
Inventor 方健乔明张波周贤达刘伦友刘哲毛焜张弦
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA