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Non-planar base grate and method for semiconductor package using same

A packaging method and substrate strip technology, which are applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, and semiconductor/solid-state device components, etc., can solve the problem that the sticky crystal reinforced substrate cannot be used for semiconductor packaging operations, and achieve easy transmission and positioning. The effect of suppressing warpage

Inactive Publication Date: 2010-02-24
POWERTECH TECHNOLOGY INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The main purpose of the present invention is to overcome the defects of the existing substrate strips and semiconductor packaging methods, and provide a new type of non-planar substrate strips and semiconductor packaging methods, which have enhanced crystal bonding and are easy to use when the substrate strips are formed. It can suppress the warpage of the substrate strip, so as to facilitate the transmission and positioning of the substrate strip, and can solve the problem that the conventional die-bonding strengthened substrate cannot perform semiconductor packaging operations in the form of a substrate strip, and is very suitable for practical use.

Method used

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  • Non-planar base grate and method for semiconductor package using same
  • Non-planar base grate and method for semiconductor package using same
  • Non-planar base grate and method for semiconductor package using same

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Embodiment Construction

[0046] In order to further explain the technical means and effects of the present invention to achieve the intended purpose of the invention, the following, in conjunction with the accompanying drawings and preferred embodiments, will describe the non-planar substrate strip proposed according to the present invention and its specific implementation methods for use in semiconductor packaging methods, Structure, method, step and effect thereof are as follows in detail. For convenience of description, in the following embodiments, the same elements are denoted by the same numbers.

[0047] According to an embodiment of the present invention, a non-planar substrate strip 200 is disclosed. see figure 2 and image 3 As shown, the non-planar substrate bar 200 has a plurality of substrate units 210 and a side rail 220 surrounding the substrate units 210 . Each substrate unit 210 is a component of a semiconductor package structure, and is used to carry and electrically connect a ch...

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Abstract

The invention relates to a non-plane surface base plate strip, comprising a base plate core layer, an outer anti-welding layer and a designed thick-film anti-welding layer, wherein the outer anti-welding layer is covered on the outer surface of a plurality of base plate units of the non-plane surface base plate strip, the designed thick-film anti-welding layer is formed on an opposite surface of the base plate core layer for covering side rails of the non-plane surface base plate strip and exposing the wafer arrangement surface of the base plate units, thereby the non-plane base plate strip has an enhanced structure strength and wafer gluing strength gain, and has the function of restraining warping when making the non-plane base plate strip. Furthermore, the invention further relates to apacking method of semi-conductors using the non-plane base plate strip, and subsequent semi-conductor packing operation can be directly done in base plate strip state, which achieves accurate transmission and exact para-position of a machine bench, and solves the problem that the known wafer gluing enhance base plate can not conduct semi-conductor packing operation in base plate strip state.

Description

technical field [0001] The present invention relates to a chip carrier used in semiconductor chip packaging, in particular to a non-planar substrate strip and a semiconductor packaging method. Background technique [0002] In the general semiconductor packaging structure, a substrate strip is used as a chip carrier, including multiple substrate units arranged in a matrix. After the semiconductor packaging operation is completed, it is then singulated and cut into semiconductor packaging products, which can achieve mass production. However, the warpage of the substrate strip will cause errors in the transmission and positioning of the substrate strip, which will have a great impact on the yield rate of the semiconductor package. The conventional substrate strip is flat, and a solder resist layer is formed on the chip setting surface and the outer surface respectively, so the warping problem of the substrate strip is not serious. In a conventional substrate structure, in orde...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/498H01L21/50H01L21/60H01L21/56
CPCH01L24/97H01L2224/32225H01L2224/4824H01L2224/73215H01L2224/92147H01L2924/15311
Inventor 范文正
Owner POWERTECH TECHNOLOGY INC