Display device

Abstract

A display device is prepared as forming display face plate by multiple pixel electrode being arranged alternatively to define out multiple pixel unit, transmitting DC power supply and control signal to driving chip by module circuit and transmitting AC voltage signal to pixel electrode by driving chip for making relevant pixel unit present image pixel. Its connecting method for making current power be uniformly distributed on electrode-wiring is also disclosed.

Description

technical field [0001] The present invention relates to a display panel, in particular to a display device with a display panel for protecting electrostatic discharge. Background technique [0002] Electronic products are extremely vulnerable to damage caused by excessive external voltage, the most common source of which is the electrostatic discharge (Electrostatic Discharge, ESD) effect caused by objects rubbing against each other. For example, in the manufacturing process, the capacitance of the human body itself It can generate hundreds or even thousands of volts of electrostatic voltage during walking or dismantling the product packaging process. As long as the electronic product has an exposed circuit structure or a module project that is electrically connected to each other during the production process, the ESD current can easily pass through The human body is transmitted to the circuit structure of the display device, which is the ESD damage of the human body discha...

AI Technical Summary

Problems solved by technology

[0005] FIG. 2 further reveals that a plurality of chip bonding pads (bond pads) 103 are provided on the liquid crystal display panel 10 for electrical connection of pins of the driver chip 11, and a plurality of FPC bonding pads 104 are provided for external wiring of the flexible circuit board 12. Outer Lead Bonding (OLB) technology for electrical connection, so the control signal sent from the hard system circuit board can be transmitted to the driver chip 11 through the flexible circuit board 12 to control the pixel display mode of the drive display panel 10; Most of the I / O pins (Input / Output pins) used to receive control signals among the multiple pins of the driver chip 11 are integrated circuit I / O components connected to its internal high-voltage and high-power processes, except for I / O components. It is designed to accept high-voltage current signals, or it has an ESD protection circuit designed for I / O components, so that there is a safe high-voltage current path for the driver chip 11 itself. At the same time, for the liquid crystal display panel 10, it is connected to The transparent electrodes 102 of the I / O pins are used as the high-voltage current path. If the material characteristics or wiring structure cannot effectively withstand the high-voltage current, it is easy to cause adverse phenomena of ESD hazards, especially on adjacent bonding pads. When the distance between 103 is designed to correspond to the distance between the pins of the driver chip 11 and reach the precision of 60 or 70 microns (um), the distance between each of the transparent electrodes 102 adjacent to the joint pad 103 corresponding to the connection pad 103 also has a certain distance. Relatively fine precision, on the other hand, due to the limited material and process characteristics of the flexible printed circuit board 12, the line width and line spacing of the signal lines laid on it cannot be refined, resulting in the FPC bonding pad 104 on the display panel 10 The spacing is wider than the spacing of the chip bonding pads 103, even up to twice the width. Therefore, the shape of the transparent electrode 102 is a funnel shape from wide to narrow from the end of the FPC bonding pad 104 to the end of the chip bonding pad 103. , which relatively represents that the electrical resistance within the unit length of the transparent electrode 102 is distributed from small to large. Once a high-voltage current signal is transmitted on the transparent electrode 102, the part with a larger resistance near the chip bonding pad 103 is easy to The formation of high-power energy accumulation, especially in the ESD current path, often leads to the ESD phenomenon of ITO burning

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