Method for constructing time invariant LDPCC based on PEG algorithm, and encoder/decoder
A technology of LDPC codes and construction methods, applied in the field of construction methods of LDPCC codes and codecs, can solve the problems of unfavorable LDPCC code hardware implementation, inability to construct, large performance randomness, etc., and achieve superior performance, excellent performance, high performance Excellent effect
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Embodiment 1
[0073] In view of the present situation of the construction method of the LDPCC code, in order to realize the construction of the time-invariant LDPCC code with controllable parameters, this embodiment describes a new method for constructing the time-invariant LDPCC code. This method is different from other construction methods of LDPCC codes at present. Its biggest feature is that regular and irregular time-invariant LDPCC codes are constructed by using the maximum loop optimization criterion. The method includes the following five main steps, and the flow of the main steps is shown in Figure 6:
[0074] step 1:
[0075] The parameters of the LDPCC code are unchanged during initialization: it is determined as k input n output LDPCC code, and its parity check matrix H T The constraint length is M; the dimension distribution function of the variable node of the LDPCC code is determined, and the dimension distribution function satisfies the constraint condition: the number of d...
Embodiment 2
[0180] This embodiment implements simple convolutional code encoding of LDPCC codes. Figure 9 shows the structure of an encoder with code rate 1 / 3 LDPCC code including: input (u(D)), system sequence output (v 1 (D)), check sequence output (v 2 (D), v 3 (D)), delay line (D register), multiplexer (MULTIPLEXER), exclusive OR gate (XOR), the delay line of constant length realizes the delay of the input source and the feedback delay of the output bit; the source bit is delayed Lines form the system sequence output; the time-invariant multiplexer multiplexes the input bits and output feedback bits on the delay line, and then forms the check sequence output through exclusive OR gate modulo 2 addition. The length of the delay line, the connection relationship of the multiplexer and the connection relationship of the XOR gate of a typical LDPCC encoder are periodically changed, and the present invention uses the constant delay line length, the connection relationship of the multiplex...
Embodiment 3
[0183] This embodiment implements pipeline decoding of LDPCC codes. The pipelined LDPCC code decoder adopts the sum check matrix H T Similar structures, including VNU computing unit, CNU computing unit, channel information and decoding information are stored in FIFO; a time-invariant VNU computing unit and a time-invariant CNU computing unit are connected to channel information invariably The information outside the sum and decoding is stored in the FIFO to form a sub-decoder; multiple sub-decoders are cascaded in series, and the number of sub-decoders is equal to the number of iterations of the sum-product algorithm; the channel information and the information outside the decoding are pipelined The decoding is completed through each sub-decoder; the output of each sub-decoding unit is the input of the next sub-decoding unit; except that the input of the first sub-decoding unit is the likelihood ratio of channel information, the other The output and input of each sub-unit are...
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