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Semiconductor device manufacturing method

A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problem of irreversible damage, and achieve the effect of excellent electrical characteristics and reliability

Inactive Publication Date: 2008-02-20
TOKYO ELECTRON LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] However, as an interlayer insulating film (Low-k film) made of a Low-k material, an interlayer insulating film containing Si in its skeleton is often used, and when etching such a Low-k film containing Si, a CF 4 gas containing F, but when removing the resist film as an etching mask afterward, when using NH 3 In the case of a gas, there will be a new problem that the damage cannot be recovered even if the silylation treatment is performed thereafter

Method used

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  • Semiconductor device manufacturing method
  • Semiconductor device manufacturing method
  • Semiconductor device manufacturing method

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Embodiment Construction

[0066] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Here, an example in which the present invention is applied to manufacturing a semiconductor device by a single damascene method and a dual damascene method will be described.

[0067] FIG. 1 is an explanatory diagram showing a schematic configuration of a semiconductor device manufacturing system used in a semiconductor device manufacturing process according to an embodiment of the present invention. This semiconductor device manufacturing system includes a processing unit 100 and a main control unit 110 that controls each component of the processing unit. The processing unit 100 includes: SOD (Spin On Dielectric) device 101; resist coating and developing device 102; exposure device 103; etching, ashing, and generating Removal and recovery processing system 104; cleaning processing device 105; sputtering device 106 as one of PVD devices; electroplating device 1...

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Abstract

A method includes forming an etching mask having a predetermined circuit pattern on an Si-containing low dielectric constant film disposed on a semiconductor substrate; performing etching on the Si-containing low dielectric constant film through the etching mask by use of an F-containing gas, thereby forming a groove or hole; performing ashing by use of NH3 gas after said etching, thereby removing the etching mask; removing a by-product generated during said ashing; and then supplying a predetermined recovery gas, thereby recovering damage of the Si-containing low dielectric constant film caused before or in said removing the etching mask.

Description

technical field [0001] The present invention relates to a method of manufacturing a semiconductor device formed by, for example, a single damascene method or a dual damascene method. Background technique [0002] In the manufacturing process of semiconductor devices, the double damascene method is often used to form wiring trenches and contact holes (for example, refer to Patent Document 1). FIG. 13 is an explanatory diagram schematically showing an example of a conventional method of forming Cu wiring by a double damascene method. [0003] First, on the substrate, for example, a wiring layer 500, an interlayer insulating film 501, and an anti-reflection film 502 are formed sequentially from below, and a first resist film 503 is formed on the surface of the multilayer film structure (FIG. 13(a). )). Next, the first resist film 503 is patterned into a predetermined pattern by photolithography ( FIG. 13( b )). In this patterning step, the first resist film 503 is exposed in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768H01L21/3105H01L21/311
CPCH01L21/31138H01L21/76814H01L21/76808H01L21/31144H01L21/31058H01L21/76826H01L21/02063H01L21/31116H01L21/3065H01L21/306H01L21/28
Inventor 浅子龙一千叶祐毅久保田和宏
Owner TOKYO ELECTRON LTD