High-definition digital television SOC chip dual-mode structure

Abstract

In the invented double mode structure, the display time sequence generator can work in dual processing modes with external memory (WM) or without external memory (WOM). In the mode of WM, this chip structure has high-class video processing functions (VPF), such as frame rate conversion, 3D removal of interlaced lines and 3D noise reduction. In the mode of WOM, this chip structure has low-cost basic VPF, such as 2D removal of interlaced lines, 2D noise reduction and video zoom. Therefore this structure has both the multi-function feature for high-level usage and the low-cost feature for low-level usage. In the mode of WOM, the synchronization between the display time sequence and the source time sequence adopts a method of synchronization of the time bases of the first active line to ensure a correct frame-field synchronization between these two sequences. This is fundamental to the correctness of the time sequence in video processing.

Description

technical field [0001] The invention is applied to a digital TV system, and is a core integrated circuit chip of a high-definition digital TV (HDTV), that is, a system-level SOC (System On Chip) chip architecture design. Background technique [0002] HDTV system-level SOC chip implements video decoder, 3-channel analog-to-digital converter, deinterlacing, video noise reduction, video scaling, video enhancement, OSD overlay, color space conversion, gamma correction, digital The integration of most of the main video processing functional units such as analog-to-analog converters and central processing units (CPUs) is highly systematic and complex. [0003] At present, only a few companies such as Genesis, Philips and Pixelworks have HDTV system-level SOC chip products in the world. Relevant chip architectures have their own characteristics, and can be divided into two categories according to whether there is a large-capacity external memory (such as SDRAM or DDR). The functi...

AI Technical Summary

Problems solved by technology

The non-external memory solution of Genesis (see U.S. Patent 5739867), only uses 2 lines of image data to realize video scaling, because the filter order is low, the scaling effect is not good; and the time base synchronization method of Genesis needs to switch between video sources In the process, the display clock PLL is reconfigured, and the response speed is slow

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