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Method for improving CuxO electric resistance memory fatigue property

A technology of resistance memory and fatigue characteristics, which is applied in the field of microelectronics, can solve the problems of deterioration of storage characteristics, reduction of erasable times of devices, damage of storage media, etc., and achieve improvement of fatigue characteristics, increase of number of erasing and writing operations, and improvement of fatigue characteristics Effect

Inactive Publication Date: 2008-03-19
FUDAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
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Problems solved by technology

[6，7] Cu produced by conventional plasma oxidation or thermal oxidation x The O(1x O The storage medium has a destructive effect, resulting in a decrease in the erasable times of the device and deterioration of the storage characteristics

Method used

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  • Method for improving CuxO electric resistance memory fatigue property
  • Method for improving CuxO electric resistance memory fatigue property
  • Method for improving CuxO electric resistance memory fatigue property

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Embodiment 1

[0039] Fig. 1 to Fig. 11 are the sectional views according to embodiment 1 of the present invention, Fig. 1 to Fig. 11 show Cu x O-resistance memory and double damascene process integrated and formed between the first layer of copper wiring and the second layer of copper wiring, Cu x O is formed above the first copper wire and under the copper plug. However, the present invention is not limited to this embodiment.

[0040] Figure 1 shows a cross-sectional view after the conventional double damascene copper interconnection process is completed until the first layer of copper wiring is fabricated, and the capping layer, interlayer dielectric (IMD), and etch stop layer are deposited. 902 is a PMD layer, which refers to the dielectric layer between the first layer of wiring and the MOS device, which can be a dielectric material such as phosphorus-doped silicon oxide PSG; 903 is a tungsten plug, which connects the first layer of wiring and the MOS device; the PMD layer 902 below ...

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Abstract

The invention belongs to the field of microelectronic technique and specifically relates to a method for improving the fatigue property of a CuxO memistor. The method removes a superficial CuO layer by means of plasma bombardment, or increases the electrical conductivity thereof, so that the method can reduce the current and voltage of the first-time write operation, protect the CuxO storage medium with resistance conversion property below the CuO layer from the damage of heavy current, and improve the fatigue property of the device.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a method for improving the fatigue characteristics of a CuxO resistance memory. Background technique [0002] Memory occupies an important position in the semiconductor market. Due to the continuous popularization of portable electronic devices, the share of non-volatile memory in the entire memory market is also increasing, of which more than 90% of the share is occupied by FLASH. However, due to the requirements for storing charges, FLASH cannot be expanded unlimitedly with the development of technology generations, and encounters serious challenges in technology generations below 45nm, which forces people to look for a next-generation non-volatile memory with better performance. Recently, resistive switching memory (resistive switching memory) has attracted high attention because of its high density, low cost, and the characteristics of breaking through th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L45/00G11C11/56
Inventor 林殷茵吕杭炳尹明唐立
Owner FUDAN UNIV
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