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Method of fabricating a bipolar transistor

A technology for bipolar transistors, manufacturing processes, used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc.

Inactive Publication Date: 2008-05-14
艾普契科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this method is that it requires two masking steps to form the trenches in which the bipolar transistors are fabricated, and another two masking steps to form the base and emitter regions
Another disadvantage is that two different epitaxial growth steps are required to form the collector region

Method used

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  • Method of fabricating a bipolar transistor
  • Method of fabricating a bipolar transistor
  • Method of fabricating a bipolar transistor

Examples

Experimental program
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Embodiment Construction

[0013] The starting point is a silicon-on-insulator (SOI) substrate comprising a silicon substrate region 1 on which a silicon dioxide region 2 and a silicon region 3 extend continuously. A silicon dioxide layer 4 is formed on the silicon region 3 using standard manufacturing techniques such as thermal oxidation processing. Polysilicon layer 5 is deposited on silicon dioxide layer 4 using standard manufacturing techniques. A hard mask layer 6 is then formed on the polysilicon layer 5, the hard mask layer 6 comprising eg silicon dioxide or another insulating material. The silicon dioxide layer 4 may include a gate oxide layer of a CMOS transistor, and the polysilicon layer 5 may include a gate electrode layer of a CMOS transistor. As shown in FIG. 1 , the first trench 11 and the second trench 12 are etched up to and including a part of the silicon substrate region 1 using standard photolithography and etching techniques. As a result, the first trench 11 and the second trench ...

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Abstract

Disclosed is a method of fabricating a bipolar transistor in a first trench (11) is disclosed wherein only one photolithographic mask is applied which forms a first trench (11) and a second trench (12). A collector region (21) is formed self-aligned in the first trench (11) and the second trench (12). A base region (31) is formed self-aligned on a portion of the collector region (21), which is in the first trench (11). An emitter region (41) is formed self-aligned on a portion of the base region (31). A contact to the collector region (21) is formed in the second trench (12) and a contact to the base region (31) is formed in the first trench (11). The fabrication of the bipolar transistor may be integrated in a standard CMOS process.

Description

technical field [0001] The invention relates to a method of manufacturing a bipolar transistor. Background technique [0002] US 6,506,657 discloses a method of fabricating bipolar transistors in trenches. A first stack is formed on a semiconductor substrate, and a second stack is formed on the first stack. The trench includes a deep trench feature exposing the semiconductor substrate and a shallow trench feature exposing the deep trench feature and the first stack. The deep and shallow trench features are formed by applying two separate photolithographic masking steps, where one side of the deep trench feature coincides with one side of the shallow trench feature. The deep trench features are then filled with selectively grown epitaxial silicon. Subsequently, a non-selectively grown epitaxial silicon layer is formed in the shallow trench feature over the selectively grown epitaxial silicon and the exposed portion of the first stack to form a collector region. Then, a ba...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/331
CPCH01L29/66272H01L29/0821
Inventor 菲利皮·默尼耶-贝亚尔埃尔文·海曾约翰内斯·J·T·M·东科尔斯弗朗索瓦·纳耶
Owner 艾普契科技有限公司
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