Low pressure difference voltage stabilizer

Abstract

A kind of low-dropout regulator, comprising a differential amplifier circuit, an output amplifier circuit and a voltage divider circuit, said output amplifier circuit comprises a PMOS transistor MPass1 whose source is connected to the input supply voltage Vdd, and connected between the voltage output point and The output capacitor Co between the ground, the two input terminals of the differential amplifier circuit are respectively connected to the reference voltage Ref and the voltage division point of the voltage divider circuit, the output terminal of the differential amplifier circuit is connected to the gate of the PMOS transistor, and the The voltage divider circuit is connected between the voltage output point and the ground, and is characterized in that it also includes a resistor Ra connected between the drain of the PMOS transistor MPass1 and the voltage output point, and a resistor Ra connected between the drain of the PMOS transistor MPass1 and the capacitor Cc between the voltage divider points. The low dropout voltage regulator provided by the invention has the advantages of low quiescent current, high power supply suppression, strong stability, low dropout voltage and low cost, and meets the needs of practical applications.

Description

technical field [0001] The invention relates to a low-drop voltage stabilizer, in particular to a low-drop voltage stabilizer with ultra-low quiescent current. Background technique [0002] In electronic design applications, an ultra-low quiescent current low dropout regulator (Low Dropout Regulator, abbreviated as LDO, also known as a low dropout voltage regulator) is required in some cases, such as the power supply of a real-time clock circuit. In many portable electronic products, there is a real-time clock circuit, and this circuit needs to always work to ensure that the time is always measured. Even when some electronic devices are replacing batteries, the real-time clock circuit can still time accurately. After down, there is only one capacitor to maintain a small amount of power, so that the real-time clock circuit needs to work with a small current, and the low-dropout voltage regulator that provides power for the real-time clock circuit also needs to consume extreme...

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Problems solved by technology

However, this design also requires a larger transconductance, which requires a larger current, and is not suitable for low-current design requirements.

[0006] There are also some traditional LDOs because the internal compensation is not strong enough, the output capacitor must use a high ESR (Equivalent Series Resistance, equivalent series resistance) tantalum capacitor or a high-capacity ceramic capacitor to generate an external zero point to be stable, usually small and medium-capacity Tantalum capacitors are much more expensive than ceramic capacitors, and the larger the capacitance, the higher the price of the same type of capacitor

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