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Semiconductor devices fabrication methods thereof

一种制造方法、半导体的技术，应用在半导体/固态器件制造、半导体器件、电气元件等方向，能够解决LDMOS-FET装置功能影响、消耗过多热预算、耗时等问题

Active Publication Date: 2010-06-02
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, forming the additional mask layer 275 is time-consuming and consumes excessive thermal budget, so that the functionality of the LDMOS-FET device is adversely affected.

Method used

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  • Semiconductor devices fabrication methods thereof
  • Semiconductor devices fabrication methods thereof
  • Semiconductor devices fabrication methods thereof

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Embodiment Construction

[0033] The detailed description of each embodiment and the accompanying drawings are used as the reference basis of the present invention below. In the drawings or written descriptions, the same reference numerals are used for similar or identical parts. And in the drawings, the shape or thickness of the embodiments may be exaggerated for simplification or convenience. Moreover, the parts of each element in the drawings will be described separately. It should be noted that the elements not shown or described in the drawings are forms well known to those skilled in the art. In addition, specific embodiments only The specific methods used to reveal the present invention are not intended to limit the present invention.

[0034] The manufacturing method of the LDMOS-FET device disclosed in the embodiment of the present invention is shown in Figure 3A-Figure 3E , performing two-stage photolithographic etching steps to form the gate stack structure, so as to form a single-sided s...

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Abstract

The invention provides a semiconductor device and the fabrication methods. The semiconductor device includes a semiconductor substrate. A gate structure patterned is arranged on the semiconductor substrate. A single spacer is formed on the first sidewall of the gate structure. The body doping region of a first type is formed in the semiconductor substrate and adjacent to the second sidewall of thegate structure. The source doping region of a second type is formed on the body doping region and has an edge aligned with the second sidewall of the gate structure. The drain doping region of the second type is formed in the semiconductor substrate and has an edge aligned with the exterior surface of the single spacer. The invention can protect the stacked structure of the gate completely and avoid receiving damages of a forward ion implantation part, therefore a stable threshold voltage value may be obtained, the craft window of the forward ion implantation part does not narrowed, and the invention may completely conform to the advanced high voltage and high power component process technology.

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing method thereof, in particular to a double-diffused metal oxide semiconductor field effect transistor (LDMOS-FET) device and a manufacturing method thereof. Background technique [0002] High-voltage component technology is suitable for high-voltage and high-power integrated circuits. One type of conventional high-voltage semiconductor device is a double-diffused-drain (DDD) CMOS structure, and the other type is a laterally diffused MOS (LDMOS) structure. Traditional high-voltage semiconductor components are mainly used in component applications higher than or roughly 18V. The advantage of high-voltage component technology is that it is cost-effective and easily compatible with other processes. It has been widely used in display driver IC components, power supplies, power management, communications, automotive electronics or industrial control and other fields. [0003] figure 1 is a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/423H01L29/06H01L21/336H01L21/28
CPCH01L29/7816H01L21/26586H01L29/66689
Inventor 陈吉智林怡君吴国铭柳瑞兴
Owner TAIWAN SEMICON MFG CO LTD