Dynamic simulation platform method for embedded processor function verification

An embedded processor and dynamic simulation technology, applied in electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of reduced efficiency of verification simulation process, low efficiency of manual writing one by one, and time-consuming functional verification platform. , to achieve the effects of strong reusability, shortened verification time, and convenient maintenance and modification

Inactive Publication Date: 2008-10-15
ZHEJIANG UNIV +1
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  • Abstract
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  • Claims
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Problems solved by technology

Since processor verification requires a lot of test incentives, it is very inefficient to manually write one by one, and it is easy to miss its function points
At the s

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  • Dynamic simulation platform method for embedded processor function verification
  • Dynamic simulation platform method for embedded processor function verification
  • Dynamic simulation platform method for embedded processor function verification

Examples

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Example Embodiment

[0043]In this embodiment, the present invention is used to perform functional verification for CKCore series embedded processors. The CKCore series of embedded processors is a 32-bit high-performance embedded processor with independent intellectual property rights developed by Hangzhou Zhongtian Microsystem Co., Ltd. and Zhejiang University.

[0044] The basic idea of ​​specific implementation is:

[0045] Establish a platform main control center and a simulation process console. The former is responsible for the establishment of the platform environment, the conversion of the working directory, the compilation of the verification platform and the start of simulation; the latter is responsible for the control of the simulation process, including the generation of incentives, and the embedded test The operation of the model processor and its instruction set reference model, the comparison of simulation results, and the processing of simulation result files.

[0046] Establish a mai...

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Abstract

The invention discloses a dynamic simulation platform method used for functional verification of an embedded processor. The method separates the control of a verification platform and the simulation flow control and respectively establishes a verification platform control center and a simulation flow control desk, the former of which is used for realizing the one-way active control flow of the verification platform and the latter is used for realizing the dynamic circulating simulation control flow, thus realizing a plurality of times of dynamic circulating operations of one-time compiling and the simulation process of the verification platform, combining the constrained random incentive generation mechanism and improving the efficiency of the functional verification. The method can provide the automated functional verification platform to the embedded processor and realize the high-efficient verification flow. The method has the advantages of high degree of automation, high verification efficiency, strong reusability, convenient maintenance and modification, etc.

Description

technical field [0001] The invention relates to the technical field of automatic function verification flow, in particular to a dynamic simulation platform method for function verification of an embedded processor. Background technique [0002] With the development of microelectronics manufacturing technology and the improvement of design process and design tools, the design scale of modern embedded processors becomes larger and larger, and the functions become more and more complex. It is difficult to meet the requirements of traditional verification methods and verification processes. Verification requirements for increasingly complex processor features and increasingly stringent time-to-market requirements. Moreover, modern embedded processors and their wide range of applications also put forward high requirements for the reliability and correctness of their design functions. The failure of embedded processor products caused by functional defects is in the incentive marke...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 严晓浪殷燎黄凯张欣傅可威陈晨葛海通
Owner ZHEJIANG UNIV
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