Antenna on stairway reflection orienting piece used for wireless interconnection between chips

Abstract

This invention refers to an antenna on an echelon reflection positioning sheet applied to wireless interconnection among chips, belonging to the electronic technical field. The design theory of the antenna is rooted from Yagi aerial and just includes an excitation polaron and a reflection polaron without a positioning polaron in order to reduce the antenna area; according to the internal structure feature of the chip, the antenna is placed at the part close to the chip edge; the excitation plaron is located at a top metal layer of the chip; a plurality of reflection polaron is located at the metal layer under the top metal layer and is arranged in echelon. This invention with compact structure is able to generate the on-chip antenna ordered by different gains and direction coefficients through adjusting the arm width of each polaron, the number, length and gap of the reflection polaron; small taking area and simple structure of the antenna are easily to be achieved by adopting the standard CMOS technique.

Description

technical field [0001] The invention relates to a stepped reflective directional on-chip antenna, which is a stepped reflective directional on-chip antenna applied to wireless interconnection between chips, and belongs to the field of electronic technology. Background technique [0002] With the continuous development and improvement of modern technology, the grid pitch of MOS tubes is getting smaller and smaller, and the rate supported by CMOS chips can reach 40GHz. Chips on the same PCB (printed circuit board) are generally interconnected by metal interconnection wires. As the frequency continues to rise, the problems of parasitic resistance, parasitic capacitance and parasitic inductance of traditional metal interconnection wires become more and more serious, and the resulting RC delay hours, IR drop, CV 2 f Power consumption and crosstalk between lines will become bottlenecks restricting the development of high-speed circuits and radio frequency circuits. At the same t...

AI Technical Summary

Problems solved by technology

Chips on the same PCB (printed circuit board) are generally interconnected by metal interconnection wires. As the frequency continues to rise, the problems of parasitic resistance, parasitic capacitance and parasitic inductance of traditional metal interconnection wires become more and more serious, and the resulting RC delay hours, IR drop, CV 2 f Power consumption and crosstalk between lines will become bottlenecks restricting the development of high-speed circuits and radio frequency circuits

At the same time, with the increasing number of chip pins and the continuous improvement of PCB integration, the wiring of PCB is becoming more and more dense, and the mutual interference between interconnection lines will bring a lot of noise to the transmission signal.

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