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Recess gate of semiconductor device and method for forming thereof

A semiconductor and gate technology, which is applied in the field of using spacers to form grooved gates, can solve the problems of increasing channel doping concentration, increasing leakage current, and deteriorating regeneration characteristics of transistors.

Inactive Publication Date: 2009-02-11
DONGBU HITEK CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, increasing the channel doping concentration causes electric field convergence on multiple source junctions and increases leakage current, deteriorating the refresh characteristics of the transistor

Method used

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  • Recess gate of semiconductor device and method for forming thereof
  • Recess gate of semiconductor device and method for forming thereof
  • Recess gate of semiconductor device and method for forming thereof

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Embodiment Construction

[0012] example figure 1 to instance Figure 9 is a process cross-sectional view illustrating a method for forming a recessed gate according to an embodiment of the present invention. example figure 1 As shown, a first nitride layer 2 may be formed over a semiconductor substrate 1 . In particular, first nitride layer 2 may be formed by depositing a thermal nitride layer over semiconductor substrate 1 to a thickness of about 100 angstroms to 200 angstroms. Here, deposition of the thermal nitride layer may be performed by chemical vapor deposition (hereinafter, referred to as "CVD").

[0013] example figure 2 As shown, a photoresist pattern 3 is formed on the first nitride layer 2 . A photoresist pattern 3 may be provided to form a gate. In particular, after the photoresist is coated over the first nitride layer 2, the photoresist may be subjected to a photolithography process using a photoresist as a gate forming mask to form a photoresist. Resist pattern 3.

[0014] ex...

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Abstract

A method for fabricating a semiconductor device, and more particularly, a method for forming a recess gate is disclosed. The method for forming a recess gate includes forming a first nitride layer over a semiconductor substrate, forming a first nitride layer pattern by selectively etching the first nitride layer to expose a portion of the substrate, forming a spacer over a sidewall of the first nitride layer pattern, forming a recess for a gate channel region by etching the substrate using the first nitride layer pattern and the spacer as an etching mask, forming a gate oxide layer over a sidewall and a bottom surface of the recess, forming a gate poly-silicon layer pattern to bury the recess and a space defined by the spacer, and removing the first nitride layer pattern.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2007-0080099 (filed on Aug. 9, 2007) based on 35 U.S.C 119, the entire contents of which are hereby incorporated by reference. technical field [0002] The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method of forming a recessed gate using a spacer. Background technique [0003] Due to the trend towards higher integration of semiconductor devices, transistors have decreased in size. Therefore, the distance between the source and the drain, that is, the channel length, has been reduced. The reduced channel length expands source / drain depletion regions into the channel, resulting in a reduction in effective channel length and threshold voltage. Unfortunately, the short channel effect deteriorates the function of the gate used to control the transistor. Furthermore, the reduced channel length induces a hot carrier phenomenon due to the ...

Claims

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Application Information

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IPC IPC(8): H01L21/28H01L21/336H01L29/423H01L29/78
CPCH01L29/66583H01L29/1037H01L29/66621Y10T29/41H01L29/66553H01L29/4236
Inventor 金大荣
Owner DONGBU HITEK CO LTD
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