NOT gate logic circuit and its forming method
A technology of logic circuits and NOT gates, applied in logic circuits, logic circuits with logic functions, circuits, etc., and can solve problems such as restricting the application of logic circuits
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[0019] figure 1 It is a schematic diagram of the structure of a NOT logic circuit of the present invention. The NOT logic circuit includes an input terminal for receiving an input voltage signal Vin; an enhanced back-gate ZnO NW FET 100, the gate electrode G1 of which is coupled to the input terminal, and the source electrode S1 of which is coupled to the ground point; and A depletion type back gate ZnONW FET 200, the drain electrode D2 of which is coupled to the voltage source ( figure 1 The medium voltage source is a DC power supply V DD ), the gate electrode G2, the source electrode S2, and the drain electrode D1 of the enhanced back-gate ZnO NW FET 100 are coupled to a point A, and the point A is used as an output terminal for outputting a voltage signal Vout.
[0020] Since the gate electrode G2 of the depletion type back gate ZnO NW FET 200 is connected to the source electrode S2, the gate voltage of the depletion type back gate ZnO NW FET 200 is zero volts, which is grea...
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