Method for producing photolithography alignment mark

Abstract

The invention discloses a preparation method for a photolithographic alignment mark. The method is used for preparing the photolithographic alignment mark on a silicon substrate and comprises the following steps: preparing an oxidation layer on the silicon substrate; carrying out the photolithography and development through photoresist and retaining the photoresist at the position of the photolithographic alignment mark; taking the formed photoresist pattern as a photolithographic masking plate so as to etch and expose the oxidation layer to the silicon surface, and finally removing the photoresist layer; and carrying out the silicon epitaxy growth to make the surface height of the epitaxial layer higher than that of the oxidation layer and form the photolithographic alignment mark. The preparation method avoids the problem of a fuzzy mark caused by the thickened epitaxial layer in the prior method for the photolithographic alignment mark based on ditch groove etching. Simultaneously, the method has the advantages of low manufacturing cost, simple process control, extended process capability window, and high alignment accuracy. The method is applied to the manufacturing of integrated circuits.

Description

technical field [0001] The invention relates to a manufacturing process of a semiconductor chip, in particular to a method for preparing a photolithography alignment mark in the manufacturing of a semiconductor chip. Background technique [0002] In the integrated circuit manufacturing process, photolithography is an important process, which replicates the designed pattern on the silicon wafer through the photoresist through glue coating and exposure. In the photolithography process, the alignment is usually to set an alignment mark on the silicon wafer, and the photolithography alignment mark includes a photolithography alignment mark and a photolithography overlay alignment mark. In the existing process, shallow trenches are generally formed by etching on silicon wafers as alignment marks. Its basic process flow is: [0003] (1) Deposit silicon oxide on a silicon substrate (see Figure 1a and Figure 1b ); [0004] (2) Apply photoresist, photolithographic development d...

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Problems solved by technology

[0007] From the above process flow, the formation of existing lithographic alignment marks requires etching of the silicon substrate, and as the thickness of the subsequent epitaxial layer increases, the depth of the etched trench also increases, and the depth can even be Reaches 0.5 microns, which is a waste of capacity

Moreover, the alignment and photolithographic overlay marks will gradually become blurred as the epitaxial layer becomes thicker, and there is a problem of accuracy.

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