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Non-volatile memory error correction system and method

A non-volatile and memory technology, applied in the field of non-volatile storage systems, can solve time-consuming problems

Inactive Publication Date: 2009-07-01
SIGMATEL
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Although the ECC method can handle memory errors, the process of reading ECC and performing error correction on damaged data in non-volatile memory is a time-consuming process

Method used

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  • Non-volatile memory error correction system and method
  • Non-volatile memory error correction system and method
  • Non-volatile memory error correction system and method

Examples

Experimental program
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Embodiment Construction

[0019] figure 1 is a block diagram of a portion of a specific exemplary processing system 100 . The system 100 includes a central processing unit (CPU) 102, non-volatile memory 104, general purpose memory interface (GPMI) 106, error detection / correction module 108, and volatile memory, such as cache or random access memory (RAM) 110. Transmission data 114 and error correction data 112 from non-volatile memory 104 may be stored in RAM 110 . CPU 102 , non-volatile memory 104 , GPMI 106 , error detection / correction module 108 , and RAM 110 are communicatively coupled via communication bus 116 .

[0020] Generally, CPU 102 processes computer readable instructions, such as software programs. In operation, CPU 102 generates memory access requests to RAM 110 and non-volatile memory 104 to request access to specific data. GPMI 106 may receive the memory access request, obtain the requested payload data, and provide the payload data, associated error detection code, and error corre...

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PUM

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Abstract

A non-volatile memory has a first payload data region and a first redundant memory area associated with the first payload data region. The first redundant memory area has a first portion, a second portion and a third portion. The first portion includes first payload error correction code (ECC) data associated with the first payload data region. The second portion includes first metadata associated with the first payload data region. The third portion includes first metadata ECC data associated with the first metadata.

Description

technical field [0001] The present invention relates generally to memory systems, and more particularly to nonvolatile memory systems with error correction. Background technique [0002] Consumer electronics devices, such as cellular telephones, digital music players, thumb drives, and other handheld devices, execute increasingly complex algorithms, such as those used to decode compressed digital audio and video data and to display user interfaces. As the complexity of these algorithms increases, the size of the memory in which these algorithms are stored also increases. [0003] Increasingly, manufacturers are turning to non-volatile memory devices, such as flash memory devices including NAND and NOR flash memory devices. Typically, non-volatile memory devices store data in logical units, such as memory pages and memory blocks. Typically, data is written to a specific page and can be read from various locations within that page. Generally, a block is the smallest unit of...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/10G06F12/16
CPCH04L49/90H04L1/0052G11C29/42G11C16/00
Inventor D·C·巴克尔R·森德尔斯
Owner SIGMATEL