Method of manufacturing semiconductor chip

Abstract

In a method in which a semiconductor wafer 1 having integrated circuits 3 formed in a plurality of chip regions and test patterns 4 formed in scribe lines 2a is divided by a plasma etching process so as to manufacture individual semiconductor chips, in the semiconductor wafer 1, a protection seat 5 which constitutes a mask in the plasma etching process is adhered onto a front plane 1a thereof where the integrated circuits 3 have been formed; since laser light 9a is irradiated along the scribe lines 2a, only a predetermined width of the protection seat 5 is removed so as to form a mask having a plasma dicing-purpose opening portion 5b; and also, the test patterns 4 are removed by the laser light 9a in combination with a front plane layer of the semiconductor wafer 1. As a result, the test patterns 4 can be removed in a higher efficiency and in simple steps, while the general purpose characteristic can be secured.

Description

technical field [0001] The present invention relates to a semiconductor chip manufacturing method for manufacturing semiconductor chips by dividing a semiconductor wafer on which test patterns have been formed on scribe lines with respect to each integrated circuit. Background technique [0002] Semiconductor chips are manufactured in such a manner that after a plurality of integrated circuits have been formed in batch mode in the case of a semiconductor wafer, the semiconductor wafer is diced along scribe lines to be divided with respect to each integrated circuit. Although various wafer dicing methods have been conventionally employed, for example, a wafer dicing method is known in which the wafer is mechanically diced using a rotary blade (for example, see Patent Document 1); A wafer dicing method is known, such as a method based on a plasma dividing process in which a portion of the wafer corresponding to a scribe line is removed by a plasma etching process to divide the...

AI Technical Summary

Problems solved by technology

That is, when the general characteristics are guaranteed, the test pattern cannot be efficiently removed by simple steps in the division step

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