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Method for forming silicide in semiconductor device

A technology of silicide and semiconductor, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, transistors, etc., and can solve problems such as silicide defects

Inactive Publication Date: 2010-01-06
DONGBU HITEK CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This may lead to silicide defects, such as abnormal formation of silicide layer 34

Method used

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  • Method for forming silicide in semiconductor device
  • Method for forming silicide in semiconductor device
  • Method for forming silicide in semiconductor device

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Embodiment Construction

[0016] Reference will now be made in detail to the preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts. In the following description of the present invention, a detailed description of known functions and constructions incorporated herein will be omitted when it may make the subject matter of the present invention unclear.

[0017] example Figure 2A As shown, a device isolation layer 102 is formed in a semiconductor substrate 100 such as a silicon substrate to define an active area and an inactive area. P-type dopants may be ion-implanted in the active region defined by the device isolation layer 102 to form the well 104 . Then, a layer made of, for example, silicon oxide (SiO 2 ) and, subsequently, forming a gate conductive layer composed of, for example, doped polysilicon on and / or over the dielectric la...

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Abstract

A method for forming silicide in a semiconductor device includes simultaneously performing a cleaning process and an etching process to remove a silicide metal layer if an excessive delay in time lapses after forming the silicide metal layer. This may prevent the occurrence of liquid marks due to an oxidation reaction at an interface of the semiconductor substrate in contact with the silicide metal layer, thereby preventing silicide defects due to the excessive delay.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2008-0063406 (filed on July 1, 2008) based on 35 U.S.C 119, the entire contents of which are hereby incorporated by reference. technical field [0002] The present invention relates to a method for forming silicides in semiconductor devices. Background technique [0003] Silicides have been widely used in semiconductor device processes because they exhibit low electrical resistance, high thermal stability, and are easily applicable to current silicon processes. In addition, the silicide layer formed on and / or over the surface of both the gate electrode and the source / drain junction can effectively reduce the specific resistance of the gate electrode and the source / drain contact resistance ( contact resistance). [0004] In particular, logic devices required to achieve high-speed operation may have serious problems in performance due to increases in gate resistance and contact resistance. Although...

Claims

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Application Information

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IPC IPC(8): H01L21/283H01L21/441
CPCH01L21/32134H01L29/7833H01L29/665H01L21/28518H01L21/28052H01L29/6659H01L21/02068H01L21/24
Inventor 郑敬华
Owner DONGBU HITEK CO LTD
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