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Processor structure

A technology for processors and configuration registers, applied in electrical digital data processing, instruments, memory systems, etc., can solve problems such as difficult expansion and difficulty in ensuring algorithm intellectual property rights, and achieve simple instruction set, good algorithm confidentiality, and simplified hardware structure Effect

Active Publication Date: 2010-03-31
PEKING UNIV SHENZHEN GRADUATE SCHOOL
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AI Technical Summary

Problems solved by technology

[0003] However, in order to support the realization of complex algorithms, the design method of general processors and instruction systems must require relatively complex instruction systems, instruction formats and implementation methods, and it is not easy to expand. For example, when the processor needs to support a new computing function Or when adding new computing components, it is often necessary to re-modify the design of the entire processor, or even modify the entire instruction system to support the realization of new functions
At the same time, based on the algorithm design of the general processor instruction system, the semantics of the program code are clear, it is relatively easy to be copied, and it is difficult to guarantee the intellectual property rights of the algorithm implementation

Method used

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Embodiment 1

[0017] The processor includes an algorithm data control unit (abbreviated as ADU, algorithm and data control unit), a data path for selecting data input or output sources, and an arithmetic unit (abbreviated as ALU) for performing arithmetic operations on input data. The ADU is responsible for configuring the data path of the data path and the computing function of the ALU, that is, for the application of related algorithms, the ADU configures the path configuration of the data path and the computing function of the ALU by executing configuration instructions.

[0018] The data path includes a data input path (Switch for short) and an output selection unit, the data input path includes a data input switching switch and a configuration register, and the output selection unit includes a data output conversion switch and an output port configuration register. The arithmetic unit ALU includes a logic operation unit and a configuration register, and the algorithm data control unit A...

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Abstract

The invention discloses a processor structure which comprises an algorithm data control unit, a data channel and an operational unit, wherein the operational unit is used for executing operation on input data; and the algorithm data control unit executes a configuration instruction to configure the input or output data path of the data channel and / or the operation function of the operational unit.The invention is favorable to the expansion of the function and quantity of the operational unit, and is favorable to the cascade connection of a plurality of processors. Simultaneously, the invention has good algorithmic security.

Description

【Technical field】 [0001] The invention relates to the field of integrated circuit design, in particular to a processor structure with configurable computing components and data paths. 【Background technique】 [0002] As the integrated circuit manufacturing process enters the 90nm-45nm stage, the realization of complex algorithms (such as digital media and wireless communication algorithms, etc.) by ASIC (Application Specific Integrated Circuit, that is, application specific integrated circuits) faces long design cycles, high design costs, and poor flexibility. , Poor scalability, it is difficult to meet the needs of rapid launch of products and continuous improvement of functions. Therefore, it is becoming more and more important to implement complex algorithms based on the storage instruction control method, that is, the processor. [0003] However, in order to support the realization of complex algorithms, the design method of general processors and instruction systems mus...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/30G06F9/318
Inventor 王新安戴鹏周丹叶兆华黄维刘彦亮魏来肖高发
Owner PEKING UNIV SHENZHEN GRADUATE SCHOOL
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