Manufacturing method of semiconductor memory

Abstract

The invention discloses a manufacturing method of a semiconductor memory, comprising the following steps of: providing a semiconductor substrate with a memory unit zone and a peripheral circuit zone; forming a grid substance layer on the semiconductor substrate; forming a first masking film on the grid substance layer, wherein the first masking film shields the peripheral circuit zone and defines a grid allay in the memory unit zone; etching to form the grid allay by using the first masking film as a barrier layer; and carrying out anti-penetration (APT) injection by using the first masking film as the barrier layer. Therefore, different form the traditional method utilizing the grid allay as the barrier layer for the APT injection, the manufacturing method retains the masking film for defining the grid allay of the memory unit zone and uses the masking film as the barrier layer for the APT injection to reduce the association degree of the thickness of the grid allay and the APT injection, thereby reducing the thickness of the grid array according to other performance requirements of the memory unit zone, and then improving the integration level of the semiconductor memory.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a manufacturing method of a semiconductor memory. Background technique [0002] Semiconductor memory is a solid-state electronic device for storing data information made by semiconductor integrated circuit technology, which is composed of a large number of storage units and input and output circuits. Compared with magnetic memory, semiconductor memory has the advantages of fast access speed, large storage capacity, small size, etc., and the memory cell array is compatible with the main peripheral logic circuit, and can be manufactured on the same chip, which greatly simplifies the input and output interface. Therefore, semiconductor memory has been widely used in electronic products such as computers, and has become an important component of electronic products such as computers. [0003] figure 1 A schematic diagram of a partial planar structure of a semiconductor me...

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Problems solved by technology

[0008] Firstly, the thicker the gate array 15 is, the more difficult it is to control its shape, that is, the more difficult it is to keep the straightness of each gate structure in the gate array 15 during the etching process, and it is easy to cause a short circuit between two adjacent word lines WL.

[0009] In addition, with the development of semiconductor integrated circuit technology, the integration level of semiconductor memory is increasing day by day, and the gap between gate arrays 15 is also getting smaller and smaller, but its thickness cannot be reduced accordingly because of the APT injection process, so , the resistance value of the unit length of each gate structure in the gate array 15 increases proportionally to the reciprocal of its width, which seriously affects the performance of the device and brings obstacles to the further miniaturization or high integration of semiconductor memories.

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