Asymmetrical high speed and low power consumption transceiver

Abstract

The invention discloses an asymmetrical high speed and low power consumption transceiver, which comprises a duplexer (10), an envelope detector (11), a demodulator (12), a digital processor (13), a power amplifier (14), a phase-locked loop frequency synthesizer (15) and a storage (16). On the premise of meeting the requirement of certain sensitivity, the extremely low power consumption wireless receiving function is realized; meanwhile, a transmitter can realize high speed and low power consumption modulation transmission, so that the transceiver can be applied to occasions with ultralow power consumption such as medical wireless implant, medical wireless imaging, wireless sensor networks and the like.

Description

technical field [0001] The invention relates to the technical field of wireless radio frequency transceivers, in particular to an asymmetric high-speed low-power transceiver device with low requirements on receiving performance, high transmission data rate and extremely low power consumption. Background technique [0002] Wireless transceivers undoubtedly play an extremely important role in applications such as medical wireless implants, medical wireless imaging, and wireless sensor networks. The key to the design of such wireless transceivers is that the power consumption must be very low to extend the battery life. In addition, this type of wireless transceiver also has some other special design requirements. For example, this type of system generally only receives simple instructions, and the performance requirements for the receiver are not very high; for the transmitter, the data rate is required to be very high, so that Send the physiological information or environmen...

AI Technical Summary

Problems solved by technology

Therefore, receivers based on frequency conversion structures are not suitable for extremely low power consumption applications

For the transmitter, the traditional modulation structure based on up-conversion can achieve high data rate, but generally requires a large power consumption; based on the phase-locked loop modulation structure, power consumption can be reduced, but the data rate is low, because the data rate Limited by the loop bandwidth of the PLL

Therefore, the traditional transmitter structure cannot meet the requirements of high speed and low power consumption

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