Forming method of N-channel metal oxide semiconductor (NMOS) transistor

A technology of transistors and semiconductors, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of device characteristic drift, fast threshold voltage rise in channel region, uneven ion distribution in Vt implantation region, etc., to prevent reverse reaction The effect of short channel effect and uniform distribution of ions

Inactive Publication Date: 2011-05-25
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology

[0008] When forming a MOS transistor in the prior art, during the re-oxidation process of the gate structure, oxygen ions will react with the silicon in the semiconductor substrate, and the silicon atoms will be squeezed into the channel region to form interstitial atoms, so that the boron in the Vt implantation region Ions diffuse by combining with silicon interstitial atoms, and silicon interstitial atoms tend to recombine at the interface between silicon and silicon dioxide, which increases the concentration of boron ions at the surface of the channel region at the edge of the gate, affecting the distribution of ions in the Vt implantation region Inhomogeneous; as the channel length shrinks, the high concentration of boron ions at the edge of the gate will cause the threshold voltage of the channel region to rise rapidly, resulting in serious reverse short channel effect (RSCE), and the threshold voltage caused by RSCE is distributed with the gate length The unevenness of the device is easy to cause a large drift of device characteristics due to process fluctuations

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  • Forming method of N-channel metal oxide semiconductor (NMOS) transistor
  • Forming method of N-channel metal oxide semiconductor (NMOS) transistor
  • Forming method of N-channel metal oxide semiconductor (NMOS) transistor

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Embodiment Construction

[0019] The specific implementation process of forming NMOS transistors in the present invention is as follows: Figure 4 As shown, step S1 is executed to provide a semiconductor substrate, and the semiconductor substrate is divided into an isolation region and an active region; step S2 is executed to form a doped well in the semiconductor substrate in the active region; step S3 is executed to form a doped well in the active region A gate dielectric layer and a gate are sequentially formed on the semiconductor substrate in the source region, and the gate dielectric layer and the gate form a gate structure; step S4 is performed to re-oxidize the gate structure; step S5 is performed to take the gate structure as Mask, implanting ions into the semiconductor substrate on both sides of the gate to form source / drain extension regions; performing step S6, forming Vt implantation regions in the semiconductor substrate after forming sidewalls on both sides of the gate structure; Step S7...

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Abstract

The invention discloses a forming method of an N-channel metal oxide semiconductor (NMOS) transistor, which comprises the following steps of: providing a semiconductor substrate which is divided into an isolation region and an active region; forming a doped well in the semiconductor substrate of the active region; forming a gate dielectric layer and a polycrystalline silicon gate on the semiconductor substrate of the active region in turn, wherein the gate dielectric layer and the polycrystalline silicon gate form a gate structure; re-oxidizing the gate structure; injecting ions into the semiconductor substrates on two sides of the gate by taking the gate structure as a mask to form a source/drain extension region; forming side walls on two sides of the gate structure, and then forming a Vt injection region in the semiconductor substrate; and forming source/drain electrodes in the semiconductor substrates on two sides of the gate structure and the side walls. The forming method ensures that ions of the Vt injection region of a channel region positioned below the gate are uniformly distributed to prevent a reverse short channel effect (RSCE).

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming an NMOS transistor. Background technique [0002] As the semiconductor industry develops towards smaller and faster devices, the feature lateral dimensions and depths of semiconductor devices are gradually reduced, requiring source / drain and source / drain extension regions (Source / DrainExtension) to become shallower accordingly. The process level requires that the depth of the source / drain junction of the semiconductor device is less than 1000 angstroms, and may eventually require the junction depth to be on the order of 200 angstroms or less. Currently, the source / drain junction is almost always formed by doping by ion implantation. As the size of electronic components shrinks, how to manufacture the source and drain of metal-oxide-semiconductor (MOS) transistors with nanometer process technology is the development direction of ion implantation techno...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336
Inventor 杨勇胜
Owner SEMICON MFG INT (SHANGHAI) CORP
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