Ultrahigh-throughput MD5 brute-force cracking device implemented based on FPGA

An ultra-high-throughput, violent technology, applied in the program control of sequence/logic controller, electrical program control, etc., can solve the problems of complex external control structure, no MD5 operation rule design, etc.

Inactive Publication Date: 2011-08-17
SHANGHAI JIAO TONG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, this existing technology is not completely designed for the operation rules of MD5, and its 32-stage pipeline is only an extension of the previously designed 4-stage pipeline.
Since the core operation of MD5 includes 64 rounds, an iterative structure is still required in the case of a 32-level pipeline, which also leads to a more complex external control structure

Method used

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  • Ultrahigh-throughput MD5 brute-force cracking device implemented based on FPGA
  • Ultrahigh-throughput MD5 brute-force cracking device implemented based on FPGA
  • Ultrahigh-throughput MD5 brute-force cracking device implemented based on FPGA

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Embodiment 1

[0031] Such as figure 1 As shown, the present embodiment includes: the input interface module realized in the FPGA, the original data generation module, the MD5 calculation module and the output interface module, and the keyboard input device and the display interface device connected to the FPGA, wherein: the input interface module and the keyboard input The device is connected and transmits the target MD5 value and control calculation information input by the user. The original data generation module is connected with the input interface module and the MD5 calculation module and transmits the 512-bit original data block information to the MD5 calculation module under the control of the clock signal. The MD5 calculation module is connected with the input interface module, the original data generation module and the output interface module and transmits the calculation result to the output interface module, and the output interface module is connected with the display interface...

Embodiment 2

[0075] Figure 8 An improved structure is described, which is used in the MD5 calculation module of this embodiment to form a structure related to the operation pipeline unit and the FIFO storage unit. Its computing core subunit P in the last stage of the pipeline 63 Certain improvements have been made (that is, adding a first-stage adder and integrating them together), which is represented by Q in the figure. In this way, the clock cycles required by the entire architecture to perform an MD5 operation can be reduced to 64.

[0076] The composition and structure of other parts in this embodiment, as well as the connections between the structures of each part, are the same as those in Embodiment 1.

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Abstract

The invention discloses an ultrahigh-throughput MD5 brute-force cracking device implemented based on a FPGA (Field Programmable Gate Array) in the technical field of digital information processing. The ultrahigh-throughput MD5 brute-force cracking device comprises an input interface module, a raw data generation module, a MD5 computation module and an output module implemented in the FPGA, and a keyboard input device and a display interface device connected to the FPGA; the input interface module is connected with the keyboard input device and transmits a target MD5 value and control computation information input by a user, the raw data generation module is connected with the input interface module and the MD5 computation module and transmits 512-bit raw data block information to the MD5 computation module under the control of a clock signal, the MD5 computation module is connected with the input interface module, the raw data generation module and the output interface module and transmits computation result to the output interface module, and the output interface module is connected with the display interface device and transmits the computed target MD5 value and the computation result. In the ultrahigh-throughput MD5 brute-force cracking device implemented based on the FPGA, information is stored in a FIFO (First in First out) memory so as to cooperate with the computation of the whole pipeline architecture, and computation efficiency is improved.

Description

technical field [0001] The invention relates to a device in the technical field of digital information processing, in particular to an FPGA-based ultra-high throughput MD5 brute force cracking device. Background technique [0002] MD5 is Message-Digest Algorithm 5 (Information Digest Algorithm 5), which is a widely used digest algorithm in computer and network communication. It is used to ensure the complete consistency of information transmission. It is often used in network communication to prevent original data from being tampered with and identity fraud Wait for the attack. An ideal digest algorithm will never produce the same signature for two sets of different input data, but to obtain this theoretically perfect algorithm, an information digest as long as the input data is required. The actual message digest algorithm (such as the MD5 algorithm), uses a digital signature of an appropriate size (such as 128 bits for the MD5 algorithm). The information sender can publi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05B19/05
Inventor 王臣袁焱
Owner SHANGHAI JIAO TONG UNIV
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