Method for protecting front face metal pattern during thermal annealing of back face of power device

Abstract

The invention relates to a method for protecting a front face metal pattern during thermal annealing of the back face of a power device, belonging to the technical field of semiconductor power devices. The method comprises the following steps of: completing the front face manufacturing process of the power device; coating a layer of organic silicon resin on the surface of a front face metal pattern of the power device; preheating and curing the organic silicon resin; performing the back face manufacturing process of the power device; and after the back face process is completed, putting the power device into an organic solvent capable of dissolving the organic silicon resin to remove the organic silicon resin. A layer of high-temperature-resistant organic silicon resin is coated and curedon the surface of the front face metal pattern of the device before back face thermal annealing, so that impurity ions in a P region or an N region on a back part can be fully activated at higher annealing temperature for a long annealing time without damaging the front face metal pattern of the device during back face thermal annealing of the device.

Description

technical field [0001] The invention belongs to the technical field of semiconductor power devices, and relates to a manufacturing process of power devices, in particular to a method for protecting front metal patterns during back thermal annealing of devices. Background technique [0002] Power semiconductor technology is the core of power electronics technology. With the development of microelectronics technology, modern power semiconductor technology represented by gate-controlled power devices and intelligent power integrated circuits has developed rapidly since the 1980s, which has greatly promoted Advances in power electronics. The continuous progress of power electronics technology in turn promotes the development of power semiconductor technology in the direction of high frequency, high temperature, high voltage, high power, intelligence and systematization. After more than 40 years of development, power semiconductor devices have continued to improve in device manu...

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Problems solved by technology

[0006] Taking NPT-IGBT as an example, when the impurity thermal annealing process is performed on the power device after impurity implantation on the back side, since the front metal is generally an aluminum layer, other metals or alloys, the annealing temperature of the impurities after impurity implantation on the back side generally does not exceed 500°C However, it takes about 500°C to repair most of the lattice defects, and about 950°C to activate impurity atoms. Therefore, the traditional low temperature (not greater than 500°C) long-term annealing method will cause the lattice defects caused by implanted impurities on the back to fail. Fully repaired, the impurity implanted on the backside cannot be fully activated

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