Fuse structure and method for forming the same

Abstract

A fuse structure and a method for forming the same are disclosed. The method is characterized in that: a semiconductor substrate is provided, wherein a circuit structure is formed on the semiconductor substrate and a metal interconnection layer is formed on the circuit structure; a fuse and an interconnection structure of the fuse and the metal interconnection layer are formed on the metal interconnection layer, wherein a material of the fuse is selected from polycrystalline germanium silicon, polycrystalline germanium, amorphous silicon, amorphous germanium or amorphous germanium silicon. Resistances of the polycrystalline germanium silicon, polycrystalline germanium, amorphous silicon, amorphous germanium or amorphous germanium silicon are high. When a polycrystalline germanium silicon fuse, a polycrystalline germanium fuse, an amorphous silicon fuse, an amorphous germanium fuse or an amorphous germanium silicon fuse are fused, a needed fusing current is small so that a relevant circuit structure is not easy to be destroyed. The fuse structure formed by using the method does not occupy a chip area when stacking on the metal interconnection layer. Therefore, the chip area can be saved and manufacturing costs can be reduced. A formation process is simple.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a fuse structure. Background technique [0002] Semiconductor integrated circuits include fuse structures, which are usually used in both circuit repair and changing the output logic value of a memory. In terms of circuit repair, when the circuit is repaired, the fuse connected to the faulty circuit is blown to make the faulty circuit structure unusable, and the faulty circuit is replaced with a redundant circuit. In terms of changing the output logic value of the memory, the output logic value is determined by blowing or not blowing the fuse. [0003] There are several common fuse structures in the prior art. The first type of fuse structure directly uses the metal interconnection wire of the metal interconnection layer as the fuse, and the fuse is cut off by laser when the circuit is repaired, so its cost is relatively high. The second type of fus...

AI Technical Summary

Problems solved by technology

The first type of fuse structure directly uses the metal interconnection wire of the metal interconnection layer as the fuse, and uses laser to cut the fuse when repairing the circuit, so its cost is relatively high

The second type of fuse structure is in a programming circuit (one time programm, OTP), multiple programming circuit (multiple time programm, MTP) or electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM) The fuse structure used in the device is not stacked with OTP / MTP / EEPROM devices, which wastes chip area, and the process is complicated, resulting in high cost.

The third fuse structure is a polysilicon fuse structure, which uses a polysilicon gate in a CMOS (Complementary Metal Oxide Semiconductor) process as a fuse. Since polysilicon has a large resistance, its fusing current is small and will not Destroy the related circuit structure, but it occupies the CMOS area, thus increasing the manufacturing cost of semiconductor devices

Yet, all do not solve the shortcoming that exists in the above-mentioned prior art

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