Floating-gate-type flash memory taking electric inductive variable shallow junction as source/drain area

Abstract

A floating-gate structure flash memory taking a variable shallow junction as a source / drain area is disclosed. Two sides above a substrate P type semiconductor material are provided with heavy doping N type semiconductor areas which form a source electrode and a drain electrode respectively. A bottom tunneling layer, a floating gate storage layer and a top barrier layer are successively arranged right above a central area of the substrate. A control grid is arranged above the top barrier layer. The floating gate storage layer uses a splitting structure and is located in a local area right above the center of a channel. A thick gate oxide layer is arranged above the P-type substrate between the floating gate storage layer and the source / drain area. The control grid is above the thick gate oxide layer. The channel refers to the shape of the area of the substrate. The bottom tunneling layer between the P-type substrate and the floating gate storage layer can prevent charges stored in the floating gate storage layer from losing to the substrate under a low field and can make the charges pass through the bottom tunneling layer so as to reach to the floating gate storage layer under the condition of programming and high filed erasure. When a grid length is shortened, a nonvolatile flash memory can be severely influenced by a short channel effect. By using the memory of the invention, the above problem can be solved.

Description

technical field [0001] The present invention relates to a new non-volatile flash memory cell structure and its programming and erasing methods, and in particular proposes a floating gate type flash memory with an inductively variable shallow junction as the source and drain regions and its operating method . Background technique [0002] Non-volatile flash memory has been widely used in various portable electronic products such as U disk drives, MP3 players, digital cameras, personal digital assistants, mobile phones and laptop computers. It has become a development trend of non-volatile flash memory. In order to further increase the storage density, the size of the storage unit is continuously reduced. However, when the channel length of the storage unit is reduced to less than 100nm, the short-channel effect of the device is very serious. The short-channel effect deteriorates the turn-off characteristic of the memory cell of the MOSFET structure, resulting in the memory ...

AI Technical Summary

Problems solved by technology

However, EJ-MOSFETs require high top gate voltage and two gate controls, which limits its further application.

For the traditional floating gate memory, due to the short channel effect, the gate length is also difficult to shrink to less than 10nm

Now, the scaling of the gate length is saturated, and it will become more difficult to further increase the storage density by reducing the size of the memory cell

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